WorldCat Identities

Stanford University Computer Systems Laboratory

Overview
Works: 824 works in 939 publications in 1 language and 1,011 library holdings
Genres: History 
Classifications: QA76.6, 001.642
Publication Timeline
Key
Publications about Stanford University Publications about Stanford University
Publications by Stanford University Publications by Stanford University
Most widely held works by Stanford University
Sparse distributed memory prototype principles of operation by Stanford University ( Book )
2 editions published in 1988 in English and held by 67 WorldCat member libraries worldwide
Verifying concurrent processes using temporal logic by Brent T Hailpern ( Book )
3 editions published between 1980 and 1983 in English and held by 7 WorldCat member libraries worldwide
Fred Terman, the father of Silicon Valley by Carolyn E Tajnai ( Book )
2 editions published in 1985 in English and held by 5 WorldCat member libraries worldwide
Technical report ( )
in English and held by 5 WorldCat member libraries worldwide
Super-scalar processor design by William M Johnson ( Book )
1 edition published in 1989 in English and held by 5 WorldCat member libraries worldwide
One-to-many interprocess communication in the V-system by David R Cheriton ( Book )
1 edition published in 1984 in English and held by 5 WorldCat member libraries worldwide
Scan line access memories for high speed image rasterization by Stefan G Demetrescu ( Book )
1 edition published in 1986 in English and held by 5 WorldCat member libraries worldwide
Detecting bridging faults with stuck-at test sets by Stanford University ( Book )
1 edition published in 1987 in English and held by 4 WorldCat member libraries worldwide
Simulations run on sample circuits show that extremely high detection of bridging faults is possible using modifications of psuedo-exhaustive test sets. Real chips often contain bridging faults, and this research shows that stuck-at test sets are not sufficient for detecting such faults. The modified pseudo-exhaustive test sets are easy to generate and require little, or no, fault simulation. Criteria have been found for identifying bridging faults unlikely to be detected by test sets. Techniques for increasing the bridging fault coverage of test sets without consuming excessive computer time are suggested. Keywords: Bridging faults, stuck-at faults, pseudo-exhaustive test, fault modeling, fault tolerant computing
Exhaustive and pseudo-exhaustive testing by Stanford University ( Book )
1 edition published in 1987 in English and held by 4 WorldCat member libraries worldwide
This chapter discusses an approach to test pattern generation for functional testing of combinational digital integrated circuits. The techniques to be presented apply all possible input patterns either to the entire circuit under test or to portions of the circuit under test. For some circuits, exhaustive testing is economically practical: all possible input combinations are applied to the entire circuit. An exhaustive test is a complete functional test and no assumptions about the internal structure of the circuit under test are required. When the number of inputs is so large that an exhaustive test is impractical, it is still possible to retain many of the advantages of exhaustive testing by using a pseudo-exhaustive test technique. Pseudo-exhaustive testing requires that some details of the internal circuit structure either be known or assumed. A disadvantage of exhaustive and pseudo-exhaustive testing is the size of the test sets: they can be substantially larger than minimum-length test sets. The major advantages of exhaustive and pseudo-exhaustive tests are the extremely high fault coverage, the generality of the fault model, and the absence of a requirement to do fault simulation. Another advantage of output function verification is the ease of generating the test set. Segmentation and determination of the corresponding test sets requires more computation. Keywords: Fault tolerant computing
Logic design education at Stanford University by Stanford University ( Book )
1 edition published in 1987 in English and held by 4 WorldCat member libraries worldwide
Computing systems: modeling and reliability issues by Stanford University ( Book )
1 edition published in 1987 in English and held by 4 WorldCat member libraries worldwide
Unidraw : a framework for building domain-specific graphical editors by John Vlissides ( Book )
2 editions published in 1989 in English and held by 4 WorldCat member libraries worldwide
Unidraw is a framework for creating object-oriented graphical editors in domains such as technical and artistic drawing, music composition, and CAD. The Unidraw architecture simplifies the construction of these editors by providing programming abstractions that are common across domains. Unidraw defines four basic abstractions: components encapsulate the appearance and semantics of objects in a domain, tools support direct manipulation of components, commands define operations on components and other objects, and external representations define the mapping between components and the file format generated by the editor. Unidraw also supports multiple views, graphical connectivity and confinement, and dataflow between components. This paper describes the Unidraw design, implementation issues, and three prototype domain-specific editors we have developed with Unidraw: a drawing editor, a user interface builder, and a schematic capture system. Experience indicates a substantial reduction in implementation time compared with existing tools
Taliesin : a distributed bulletin board system by Judy L Edighoffer ( Book )
1 edition published in 1985 in English and held by 4 WorldCat member libraries worldwide
This paper describes a computer bulletin board facility intended to support replicated bulletin boards on a network that may frequently be in state of partition. The two major design issues covered are the choice of a name space and the choice of replication algorithms. The impact of the name space on communication costs is explained. A special purpose replication algorithm that provides high availability and response network partition is introduced
Preprints by Stanford University ( Book )
1 edition published in 1987 in English and held by 4 WorldCat member libraries worldwide
Preemptable remote execution facilities for the V-system by Marvin M Theimer ( Book )
1 edition published in 1985 in English and held by 4 WorldCat member libraries worldwide
A remote execution facility allows a user of a workstation-based distributed computer system to offload programs onto idle workstations, thereby providing the user with access to computational resources beyond that provided by his personal workstation. This paper, describes the design and performance of the remote execution facility in the V distributed system, as well as several implementation issues of interest. In particular, the authors focus on network transparency of the execution environment, preemption and migration of remotely executed programs, and avoidance of residual dependencies on the original host. It is agreed that preemptable remote execution allows idle workstations to be used as a pool of processors without interfering with use by their owners and without significant overhead for the normal execution of programs. In general, it is concluded that the cost of providing preemption is modest compared to providing a similar amount of computation service by dedicated computation engines. (Author)
Simulation of busy tone multiple access modes in multihop packet radio networks by Fouad A Tobagi ( Book )
1 edition published in 1982 in English and held by 4 WorldCat member libraries worldwide
In this study we examine via simulation, the performance of the ALOHA, CSMA, BTMA, and CDMA channel access schemes in multihop packet radio systems. The performance of CSMA, which is efficient in fully-connected environments, is shown to degrade significantly in the presence of hidden nodes. The BTMA protocol attempts to overcome the hidden node problem and to obtain efficient channel utilization in multihop environments by having nodes transmit a busy tone when they are busy receiving. In an example of a six node ring topology, we compare the performance of the CSMA and ALOHA schemes with four variants of BTMA. The highest throughput is achieved by II-BTMA and C-BTMA, which both significantly outperform the CSMA and ALOHA schemes. Our conclusion is that the improvement in bandwidth utilization achieved by BTMA in environments with hidden nodes, is expected to more than compensate for the cost of the busy tone channel. (Author)
An empirical study of distributed application performance by Keith A Lantz ( Book )
1 edition published in 1985 in English and held by 4 WorldCat member libraries worldwide
A major reason for the rarity of distributed applications, despite the proliferation of networks, is the sensitivity of their performance to various aspects of the network environment. We demonstrate that distributed applications can run faster than local ones, using common hardware. We also show that the primary factors affecting performance are, in approximate order of importance: speed of the user's workstation, speed of the remote host (if any), and the high-level (above the transport level) protocols used. In particular, the use of batching, pipelining, and structure in high-level protocols reduces the degradation often experienced between different bandwidth networks. Less significant, but still noticeable improvements results from proper design and implementation of the underlying transport protocols. Ultimately, with proper application of these techniques, network bandwidth is rendered virtually insignificant. (KR)
Software-controlled caches in the VMP multiprocessor by David R Cheriton ( Book )
1 edition published in 1986 in English and held by 4 WorldCat member libraries worldwide
VMP is an experimental multiprocessor that follows the familiar basic design of multiple processors, each with a cache, connected by a shared bus to global memory. Each processor has a synchronous, virtually addressed, single master connection to its cache, providing very high memory bandwidth. An unusually large cache page size and fast sequential memory copy hardware make it feasible for cache misses to be handled in software, analogously to the handling of virtual memory page faults. Hardware support for cache consistency is limited to a simple state machine that monitors the bus and interrupts the processor when a cache consistency action is required. In this paper, we show how the VMP design provides the high memory bandwidth required by modern high-performance processors with a minimum of hardware complexity and cost. We also describe simple solutions to the consistency problems associated with virtually addressed caches. Simulation results indicate that the design achieves good performance providing data contention is not excessive. (kr)
Dynamic detection of concurrency in DO-loops using ordering matrices by Stanford University ( Book )
3 editions published in 1981 in English and held by 4 WorldCat member libraries worldwide
An abstract model of a concurrency detection structure called an ordering matrix is presented. This structure is used, with two other execution vectors, to represent the dependencies between instructions and indicate where potential concurrency exists
Testable structures for CMOS VLSI circuits by Stanford University ( Book )
1 edition published in 1987 in English and held by 4 WorldCat member libraries worldwide
 
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Alternative Names

controlled identity Stanford University. Computer Science Department

controlled identity Stanford University. Department of Electrical Engineering

Computer Systems Laboratory (Stanford University)
Stanford University. Computer Science Department. Computer Systems Laboratory
Stanford University. Department of Electrical Engineering. Computer Systems Laboratory
Languages
English (28)