WorldCat Identities

Knight, Thomas F, Jr

Works: 5 works in 13 publications in 1 language and 13 library holdings
Classifications: Q335.M41,
Publication Timeline
Most widely held works by Thomas F, Jr Knight
A Coherent VLSI Design Environment( Book )

4 editions published between 1985 and 1987 in English and held by 4 WorldCat member libraries worldwide

It has been an open question in electrical network theory whether it is possible to synthesize a network with a prescribed natural frequency (in the complex s-plane) out of a restricted class of components. It was possible to say since the 1950s that no natural frequencies can be obtained in certain parts of the s-plane, but not the converse, namely that at other points a circuit can be devised. This question is of modern importance since the components in question may be MOS transistors and RC lines, whose accurate high-frequency models are complicated. It is important to know how fast a rise time can be achieved, or at what frequencies unwanted oscillations might occur. A set of necessary and sufficient bounds are now possible, in the sense that every point in the s-plane can be easily discovered to be either a frequency at which oscillation cannot occur with any possible combination of components and ideal transformers, or else a point at which a circuit consisting of a few such components and ideal transformers can be made to oscillate. The inclusion of ideal transformers is necessary since otherwise generally only a finite or countable number of natural frequencies can be found. (RH)
Critical problems in very large scale computer systems by Massachusetts Institute of Technology( Book )

5 editions published between 1988 and 1990 in English and held by 4 WorldCat member libraries worldwide

The research vehicle for this contract is the largest possible computer that could be conceived for the mid to late 1990's. The technical challenges of such a machine serve as our guiding stimulus for the research carried out and reported here. We imagine this machine to occupy a 14-story building, to cost upward of $1 billion, and to be so colossal that the nation could only afford one or two of them. The available chip technology and machine size are consistent with 10 to the 15th power FLOPS and 10 to the 15th power bytes of memory. The machine will be used to solve large-scale scientific problems having both military and civilian applications. This investigation addresses the hardware technology, software techniques, algorithms, communications, processing elements, and applications. The study will determine the plausibility (not feasibility) of the machine. Progress in these various areas are highlighted in the forthcoming sections. (rrh)
Computer aided evolutionary design for digital integrated systems by Gerald Jay Sussman( Book )

2 editions published in 1979 in Undetermined and English and held by 2 WorldCat member libraries worldwide

We propose to develop a computer aided design tool which can help an engineer deal with system evolution from the initial phases of design right through the testing and maintenance phases. We imagine a design system which can function as a junior assistant. It provides a total conversational and graphical environment. It remembers the reasons for design choices and can retrieve and do simple deductions with them. Such a system can provide a designer with information relevant to a proposed modification and can help him understand the consequences of simple modifications by pointing out the structures and functions which will be affected by the modifications. The designer's assistant will maintain a vast amount of such annotation on the structure and function of the system being evolved and will be able to retrieve the appropriate annotation and remind the designer about the features which he installed too long ago to remember, or which were installed by other designers who work with him. We will develop the fundamental principles behind such a designer's assistant and we will construct a prototype system which meets many of these desiderata. (Author)
Amorphous and Cellular Computing( )

1 edition published in 2001 in English and held by 0 WorldCat member libraries worldwide

The objective of this research is to create the architectural, algorithmic, and technological foundations for exploiting programmable materials. These are materials that incorporate vast numbers of programmable elements that react to each other and to their environment. Such materials can be fabricated economically, provided that the computing elements are amassed in bulk without arranging for precision interconnect and testing. In order to exploit programmable materials we must identify engineering principles for organizing and instructing myriad programmable entities to cooperate to robustly achieve pre-established goals, even though the individual entities are unreliable and interconnected in unknown, irregular, and time-varying ways. Progress in microfabrication and in bioengineering will make it possible to assemble such amorphous systems at almost no cost, provided that (1) the units need not all work correctly; (2) the units are identically programmed; and (3) there is no need to manufacture precise geometrical arrangements of the units or precise interconnections among them
Routing statistics for unqueued Banyan networks by Thomas F Knight( )

1 edition published in 1990 in English and held by 0 WorldCat member libraries worldwide

Banyan networks comprise a large class of networks that have been used for interconnection in large-scale multiprocessors and telephone switching systems. Regular variants of Banyan networks, such as delta and butterfly networks, have ben used in multiprocessors such as the IBM RP3 and the BBN butterfly. Analysis of the performance of Banyan networks has typically focused on these regular variants. We present a methodology for performance analysis of unbuffered Banyan multistage interconnection networks. The methodology has two novel features: it allows analysis of networks where some inputs are more likely to be active than others, and allows analysis of Banyan networks of arbitrary topology. A Banyan network is a network in which there is a unique path from each input to each output. (KR)
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Audience level: 0.94 (from 0.72 for Routing st ... to 0.99 for A Coherent ...)

English (12)