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Addition machines

著者: Robert W Floyd; Donald Ervin Knuth; Stanford University. Computer Science Department.
出版: Stanford, Calif. : Dept. of Computer Science, Stanford University, 1989.
シリーズ: Report (Stanford University. Computer Science Department), no. STAN-CS-89-1254.
エディション/フォーマット:   書籍 : Englishすべてのエディションとフォーマットを見る
データベース:WorldCat
概要:
An addition machine is a computing device with a finite number of registers, limited to the following six types of operations.

Read x {input to register x} x <-- y {copy register y to register x} x <-- x + y {add register y to register x} x <-- x - y {subtract register y from register x} if x>= y {compare register x to register y} write x {output from register x}

The register contents are assumed to belong to a given set A, which is an additive subgroup of the real numbers. If A is the set of all integers, we say the device is an integer addition machine; if A is the set of all real numbers, we say the device is a real addition machine.

We will consider how efficiently an integer addition machine can do operations such multiplication, division, greatest common divisor, exponentiation, and sorting. We will also show that any addition machine with at least six registers can compute the ternary operation x[y/z] with reasonable efficiency, given x, y, z in A with z not equal to 0.  続きを読む

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ドキュメントの種類: 図書
すべての著者/寄与者: Robert W Floyd; Donald Ervin Knuth; Stanford University. Computer Science Department.
OCLC No.: 20244230
注記: Cover title.
"April 1989."
"This research was supported in part by the National Science Foundation under grant CCR-86-10181, and by Office of Naval Research contract N00014-87-K-0502"--P. 1.
物理形態: 15 p. ; 28 cm.
シリーズタイトル: Report (Stanford University. Computer Science Department), no. STAN-CS-89-1254.
責任者: by Robert W. Floyd and Donald E. Knuth.

概要:

An addition machine is a computing device with a finite number of registers, limited to the following six types of operations.

Read x {input to register x} x <-- y {copy register y to register x} x <-- x + y {add register y to register x} x <-- x - y {subtract register y from register x} if x>= y {compare register x to register y} write x {output from register x}

The register contents are assumed to belong to a given set A, which is an additive subgroup of the real numbers. If A is the set of all integers, we say the device is an integer addition machine; if A is the set of all real numbers, we say the device is a real addition machine.

We will consider how efficiently an integer addition machine can do operations such multiplication, division, greatest common divisor, exponentiation, and sorting. We will also show that any addition machine with at least six registers can compute the ternary operation x[y/z] with reasonable efficiency, given x, y, z in A with z not equal to 0.

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