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Associative digital network theory : an associative algebra approach to logic, arithmetic and state machines

Author: Nico F Benschop
Publisher: Dordrecht ; New York : Springer, 2009.
Edition/Format:   Print book : English : 1st edView all editions and formats
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Suitable for researchers at industrial laboratories, teachers and students at technical universities, in electrical engineering, computer science and applied mathematics departments, interested in  Read more...

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Document Type: Book
All Authors / Contributors: Nico F Benschop
ISBN: 9781402098284 1402098286 9781402098291 1402098294
OCLC Number: 297148265
Description: xii, 180 pages : illustrations ; 24 cm
Contents: PART 1 -- Sequential Logic: Finite Associative Closure. 1 Introduction. 1.1 Sequential and combinational Logic. 1.2 Five basic state machines, as network components. 1.3 Subset/partition, local/global, additive/mult've. 1.4 Integer arithmetic: residues with carry. 2 Simple Semigroups and the Five Basic Machines. 2.1 State Machine: Sequential Closure and Rank. 2.2 Basic Machines and Simple Semigroups. 2.3 Equivalent idempotents: memory components L,R. 2.4 Maximal Subgroups: periodic G. 2.5 Constant Rank Machines, and simple semigroups. 3 Coupling State Machines. 3.1 Introduction. 3.2 No coupling: semigroup Z(.) mod m, composite m. 3.3 Machine decomposition: right congruence suffices. 3.4 Cascade composition: full groups FG3 and FG4. 3.5 Decomposing the full- and alternating group over four states. 3.6 Decomposing simple groups AGn _ FGn for n > 4. 3.7 Loop composition superfluous. 4 General Network Decomposition of State Machines. 4.1 Introduction. 4.2 Implementing M = (Q,A) by its alphabet A. 4.3 Bottom-up rank driven decomposition of S = A*/Q. 4.4 Partial direct products, unused codes, efficiency. 4.5 Example. 4.6 Invariants: ordered commuting idempotents. PART 2 -- Combinational Logic: Associative, Commuting Idempotents. 5 Symmetric and Planar Boolean Logic Synthesis. 5.1 Introduction. 5.2 Logic Synthesis independent of input ordering. 5.3 Symmetric and Threshold BF's. 5.4 Planar cut and factoring. 5.5 Fast symmetric synthesis: quadratic in nr. inputs. 5.6 Experiments and conclusion. 5.7 Planar Boolean logic synthesis. 6 Fault Tolerant Logic with Error Correcting Codes. 6.1 Introduction. 6.2 Fault tolerant IC design environment. 6.3 Three error correction methods for logic circuits. 6.4 Demonstration of experimental circuit. 6.5 Results for typical designs. 6.6 Conclusions. PART 3 -- Finite Arithmetic: Associative, commutative. 7 Fermat's Small Theorem extended to rp-1 mod p3. 7.1 Introduction. 7.2 Lattice structure of semigroup Z(.) mod q. 7.3 Distinct rp-1 mod p3 for divisors r|p A 1. 8 Additive structure of units group mod pk, with carry extension for a proof of Fermat's Last Theorem. 8.1 Introduction. 8.2 Structure of the group Gk of units. 8.3 Cubic root solution in core, and core symmetries. 8.4 Symmetries as functions yield 'triplets'. 8.5 Relation to Fermat's Small and Last Theorem. 8.6 Conclusions and Remarks. 9 Additive structure of Z(.) mod mk (squarefree) and Goldbach's conjecture. 9.1 Lattice of groups. 9.2 Primes, composites and neighbours. 9.3 Euclidean prime sieve. 9.4 Proving GC via GR(k) by induction on k. 9.5 Conclusions. 10 Powersums Sxp represent residues mod pk, from Fermat to Waring. 10.1 Introduction. 10.2 Core increments as coset generators. 10.3 Core extensions: Ak to Fk, and pairsums mod pk. 10.4 Conclusions. 11 Log-arithmetic, with single and dual base. 11.1 Log-arithmetic with dual base 2 and 3. 11.2 European Logarithmic Microprocessor ELM. Bibliography. Index.
Responsibility: Nico F. Benschop.

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