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Asynchronous system-on-chip interconnect

Author: John Bainbridge
Publisher: London ; New York : Springer, 2002.
Series: CPHC/BCS distinguished dissertations.
Edition/Format:   Print book : EnglishView all editions and formats
Summary:

In this book, John Bainbridge investigates the design of an asynchronous on-chip interconnect, looking at all the stages of the design from the choice of wiring layout, through asynchronous  Read more...

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Material Type: Internet resource
Document Type: Book, Internet Resource
All Authors / Contributors: John Bainbridge
ISBN: 185233598X 9781852335984
OCLC Number: 49238588
Description: xvi, 138 pages : illustrations ; 24 cm.
Contents: 1. Introduction. Asynchronous design and its advantages. Disadvantages of asynchronous design --
2. Asynchronous Design. Asynchronous design --
3. System Level Interconnect Principles. Point-to-point communication paths. Multipoint interconnect topology. Bus protocol issues. Interconnect performance objectives. Commercial on-chip buses --
4. The Physical (Wire) Layer. Wire theory. Electrical and physical characteristics. Termination. Crosstalk --
5. The Link Layer. Centralised vs. distributed interfaces. Signalling convention. Data encoding. Handshake sources. Bidirectional data transfer. Multiple initiators on one channel. Multiple targets. Multipoint bus-channel interfaces. MARBLE's link layer channels --
6. Protocol Layer. Transfer phases. Exceptions. Defer and bridging. Mapping transfer phases onto channel cycles. Transfer cycle routing. Transfer cycle initiation. MARBLE's dual-channel bus architecture --
7. Transaction Layer. Split transactions. Response ordering. MARBLE's transaction layer --
8. MARBLE: A Dual-Channel Split Transfer Bus. MARBLE protocol and signal summary. Bus transaction interface implementation. MARBLE in the AMULET3H system --
9. Evaluation. MARBLE testbed. Simulation of MARBLE in AMULET3H. Analysis of delay distribution. Hardware requirements. Comparison with synchronous alternatives --
10. Conclusion. Advantages and disadvantages of MARBLE. Improving the MARBLE bus. Alternative interconnect solutions and future work. The future of asynchronous SoC interconnect? --
App. A. MARBLE Schematics.
Series Title: CPHC/BCS distinguished dissertations.
Responsibility: John Bainbridge.
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