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Co-verification of hardware and software for ARM SoC design

Author: Jason R Andrews
Publisher: Amsterdam ; Boston : Elsevier, ©2005.
Series: Embedded technology series.
Edition/Format:   eBook : Document : EnglishView all editions and formats
Summary:
Hardware/software co-verification is how to make sure that embedded system software works correctly with the hardware, and that the hardware has been properly designed to run the software successfully -before large sums are spent on prototypes or manufacturing. This is the first book to apply this verification technique to the rapidly growing field of embedded systems-on-a-chip(SoC). As traditional embedded system  Read more...
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Genre/Form: Electronic books
Additional Physical Format: Print version:
Andrews, Jason R.
Co-verification of hardware and software for ARM SoC design.
Amsterdam ; Boston : Elsevier, ©2005
(DLC) 2004053860
(OCoLC)55671903
Material Type: Document, Internet resource
Document Type: Internet Resource, Computer File
All Authors / Contributors: Jason R Andrews
ISBN: 9780750677301 0750677309 0080476902 9780080476902
OCLC Number: 162592786
Notes: Includes index.
Description: 1 online resource (xxiii, 260 pages) : illustrations.
Contents: 1. Embedded System Verification --
2. Hardware and Software Design Process: System initialization software and hardware abstraction layer (HAL), Hardware diagnostic test suite, Real-time operating system (RTOS), RTOS device drivers, Application software, C simulation, Logic simulation, Simulation acceleration, Emulation, Prototype; --
3. SoC Verification Topics for the ARM Architecture; --
4. Hardware/Software Co-Verification: Host-code execution --
implicit access, ISS + BIM, CCM, RTL, Hardware model, Emulation board, FPGA Prototype; --
5. Advanced Hardware/Software Co-Verification: Direct access to simulation memories without advancing simulation time, Memory and time optimizations --
understanding synchronization, Cross network connections versus using a single workstation, C modeling for some of the hardware, Implicit Access, Post-processing techniques for software debugging, Synchronized software and hardware views for debugging, Post-processing software trace, Save/restore, How to deal with peripherals, How to deal with an RTOS; --
6. Hardware Verification Environment and --
Co-Verification: Testbench, The use of testbench tools, Random test generation based on CPU address map, CPU bus protocol checking, Functional/ Transaction coverage, Memory coverage, Property checking --
did a specific scenario ever happen? Use of a design signoff model; --
7. Methodology for an Example ARM SoC.
Series Title: Embedded technology series.
Responsibility: by Jason R. Andrews.
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Hardware/software co-verification is how to make sure that embedded system software works correctly with the hardware, and that the hardware has been properly designed to run the software  Read more...

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"Jason Andrews is one of the acknowledged world's experts in hardware/software verification. His unique knowledge, spanning both hardware design and software development, has enabled him to come up Read more...

 
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