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Design and modeling for 3D ICs and interposers

Author: Madhavan Swaminathan
Publisher: Hackensack, NJ : World Scientific, 2014.
Series: WSPC series in advanced integration and packaging, 2.
Edition/Format:   eBook : Document : EnglishView all editions and formats
Database:WorldCat
Summary:
3D Integration is being touted as the next semiconductor revolution. This book provides a comprehensive coverage on the design and modeling aspects of 3D integration, in particularly, focus on its electrical behavior. Looking from the perspective the silicon via (TSV) and glass via (TGV) technology, the book introduces 3D ICs and Interposers as a technology, and presents its application in numerical modeling, signal  Read more...
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Genre/Form: Electronic books
Additional Physical Format: Print version:
Swaminathan, Madhavan.
Design and modeling for 3D ICs and interposers
(OCoLC)865464937
Material Type: Document, Internet resource
Document Type: Internet Resource, Computer File
All Authors / Contributors: Madhavan Swaminathan
ISBN: 9789814508605 9814508608
OCLC Number: 868319143
Description: 1 online resource (200 pages).
Contents: Ch. 1. System integration and modeling concepts. 1.1. Moore's law. 1.2. IC integration vs system integration --
what is the difference? 1.3. History of integration --
an overview. 1.4. Primary drivers for 3D integration. 1.5. Role of the interposer in 3D integration. 1.6. Modeling and simulation. 1.7. Summary --
ch. 2. Modeling of cylindrical interconnections. 2.1. Introduction. 2.2. Specialized basis functions. 2.3. Electric field integral equation (EFIE) with cylindrical CMBF for resistance and inductance extraction. 2.4. Scalar potential integral equation (SPIE) with cylindrical AMBF for conductance and capacitance extraction. 2.5. Broadband equivalent RLC network. 2.6. Inclusion of planar structures. 2.7. Examples with bonding wires. 2.8. Examples with vias. 2.9. Example of package on package. 2.10. Summary --
ch. 3. Electrical modeling of through silicon vias. 3.1. Benefits of through silicon vias. 3.2. Challenges in modeling through silicon vias. 3.3. Propagating modes in through silicon vias --
an electromagnetic perspective. 3.4. Physics based modeling of through silicon vias. 3.5. Rigorous electromagnetic modeling. 3.6. Modeling of conical through silicon via. 3.7. MOS capacitance effect. 3.8. Consideration of MOS capacitance effect in electromagnetic modeling. 3.9. Time domain response. 3.10. Summary --
ch. 4. Electrical performance and signal integrity. 4.1. Process optimization. 4.2. Cross talk in interposers. 4.3. Via arrays. 4.4. Interposers. 4.5. Modeling and design challenges. 4.6. Summary --
ch. 5. Power distribution, return path discontinuities and thermal management. 5.1. Power distribution --
an overview. 5.2. Power distribution for 3D integration. 5.3. Current paths in IC and package. 5.4. Signal and power integrity --
does one affect the other? 5.5. Challenges for addressing power distribution in 3D ICs and interposers. 5.6. Thermal management and its effect on power distribution. 5.7. Summary --
ch. 6. Alternate methods for power distribution. 6.1. Introducing power transmission lines. 6.2. Constant current power transmission line (CCPTL). 6.3. Pseudo balanced power transmission line (PBPTL). 6.4. Constant voltage power transmission line (CVPTL). 6.5. Power calculations. 6.6. Application of power transmission lines to FPGA. 6.7. Managing signal and power integrity for 3D ICs. 6.8. Summary.
Series Title: WSPC series in advanced integration and packaging, 2.
Responsibility: by Madhavan Swaminathan, Ki Jin Han.

Abstract:

3D Integration is being touted as the next semiconductor revolution. This book provides a comprehensive coverage on the design and modeling aspects of 3D integration, in particularly, focus on its electrical behavior. Looking from the perspective the silicon via (TSV) and glass via (TGV) technology, the book introduces 3D ICs and Interposers as a technology, and presents its application in numerical modeling, signal integrity, power integrity and thermal integrity. The authors underscored the potential of this technology in design exchange formats and power distribution.

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