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Field programmable logic : architectures, synthesis and applications ; proceedings

Author: Reiner W Hartenstein; International Workshop on Field Programmable Logic and Applications
Publisher: Berlin ; Heidelberg ; New York ; London ; Paris ; Tokyo ; Hong Kong ; Barcelona ; Budapest : Springer, 1994.
Series: Lecture notes in computer science, vol. 849.
Edition/Format:   Print book : Conference publication : German
Publication:Field-Programmable Logic: Architectures, Synthesis and Applications.
Summary:

This volume of conference proceedings contains research papers on FPGA-based computer architectures, high-level design, prototyping and ASIC emulators, commercial devices, new tools, CCMs and HW/SW  Read more...

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Genre/Form: Kongreß
Conference papers and proceedings
Kongress
Congresses
Material Type: Conference publication, Internet resource
Document Type: Book, Internet Resource
All Authors / Contributors: Reiner W Hartenstein; International Workshop on Field Programmable Logic and Applications
ISBN: 3540584196 9783540584193 0387584196 9780387584195
OCLC Number: 75502358
In: Hartenstein, Reiner W
Notes: Literaturangaben.
Description: XI, 434 Seiten : Illustrationen, Diagramme ; 24 cm.
Contents: Fault modeling and test generation for FPGAs.- A test methodology applied to Cellular logic Programmable Gate Arrays.- Integrated layout synthesis for FPGA's.- Influence of logic block layout architecture on FPGA performance.- A global routing heuristic for FPGAs based on mean field annealing.- Power dissipation driven FPGA place and route under delay constraints.- FPGA technology mapping for power minimization.- Specification and synthesis of complex arithmetic operators for FPGAs.- A speed-up technique for synchronous circuits realized as LUT-based FPGAs.- An efficient technique for mapping RTL structures onto FPGAs.- A testbench design method suitable for FPGA-based prototyping of reactive systems.- Using consensusless covers for fast operating on Boolean functions.- Formal verification of timing rules in design specifications.- Optimized synthesis of self-testable finite state machines (FSM) using BIST-PST structures in Altera structures.- A high-speed rotation processor.- The MD5 message-digest algorithm in the XILINX FPGA.- A reprogrammable processor for fractal image compression.- Implementing GCD systolic Arrays on FPGA.- Formal CAD techniques for safety-critical FPGA design and deployment in embedded subsystems.- Direct sequence spread spectrum digital Radio DSP prototyping using xilinx FPGAs.- FPGA based reconfigurable architecture for a compact vision system.- A new FPGA architecture for word-oriented datapaths.- Image processing on a custom computing platform.- A superscalar and reconfigurable processor.- A fast FPGA implementation of a general purpose neuron.- Data-procedural languages for FPL-based machines.- Implementing on line arithmetic on PAM.- Software environment for WASMII: A data driven machine with a virtual hardware.- Constraint-based hierarchical placement of parallel programs.- ZAREPTA: A zero lead-time, all reconfigurable system for emulation, prototyping and testing of ASICs.- Simulating static and dynamic faults in BIST structures with a FPGA based emulator.- FPGA based prototyping for verification and evaluation in hardware-software cosynthesis.- FPGA based low cost Generic Reusable Module for the rapid prototyping of subsystems.- FPGA development tools: Keeping pace with design complexity.- Meaningful benchmarks for logic optimization of table-lookup FPGAs.- Educational use of Field Programmable Gate Arrays.- Hardwire: A risk-free FPGA-to-ASIC migration path.- Reconfigurable hardware from programmable logic devices.- On some limits of XILINX based control logic implementations.- Experiences of using XBLOX for implementing a digital filter algorithm.- Continuous interconnect provides solution to density/performance trade-off in programmable logic.- A high density complex PLD family optimized for flexibility, predictability and 100% routability.- Design experience with fine-grained FPGAs.- FPGA routing structures from real circuits.- A tool-set for simulating altera-PLDs using VHDL.- A CAD tool for the development of an Extra-Fast Fuzzy Logic Controller based on FPGAs and memory modules.- Performance characteristics of the Monte-Carlo clustering processor (MCCP) - a field programmable logic based custom computing machine.- A Design Environment with Emulation of Prototypes for hardware/software systems using XILINX FPGA.- DSP development with full-speed prototyping based on HW/SW codesign techniques.- The architecture of a general-purpose processor cell.- The design of a stack-based microprocessor.- Implementation and performance evaluation of an image pre-processing chain on FPGA.- Signature testability of PLA.- A FPL prototyping package with a C++ interface for the PC bus.- Design of safety systems using Field Programmable Gate Arrays.- A job dispatcher-collector made of FPGA's for a centralized Voice Server.- An optoelectronic 3-D Field Programmable Gate Array.- On channel architecture and routability for FPGA's under faulty conditions.- High-performance datapath implementation on Field-Programmable Multi-Chip Module (FPMCM).- A laboratory for a digital design course using FPGAs.- Coordinate Rotation DIgital Computer (CORDIC) synthesis for FPGA.- MARC: A Macintosh NUBUS-expansion board based reconfigurable test system for validating communication systems.- Artificial neural network implementation on a fine-grained FPGA.
Series Title: Lecture notes in computer science, vol. 849.
Responsibility: 4th International Workshop on Field Programmable Logic and Applications, FPL '94, Prague, Czech Republic, September 1994. Reiner W. Hartenstein ; Michal Z. Servít (ed.).

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Primary Entity

<http://www.worldcat.org/oclc/75502358> # Field programmable logic : architectures, synthesis and applications ; proceedings
    a schema:Book, schema:CreativeWork ;
    library:oclcnum "75502358" ;
    library:placeOfPublication <http://experiment.worldcat.org/entity/work/data/3855544765#Place/barcelona> ; # Barcelona
    library:placeOfPublication <http://dbpedia.org/resource/New_York_City> ; # New York
    library:placeOfPublication <http://experiment.worldcat.org/entity/work/data/3855544765#Place/berlin> ; # Berlin
    library:placeOfPublication <http://experiment.worldcat.org/entity/work/data/3855544765#Place/tokyo> ; # Tokyo
    library:placeOfPublication <http://id.loc.gov/vocabulary/countries/gw> ;
    library:placeOfPublication <http://experiment.worldcat.org/entity/work/data/3855544765#Place/paris> ; # Paris
    library:placeOfPublication <http://dbpedia.org/resource/London> ; # London
    library:placeOfPublication <http://experiment.worldcat.org/entity/work/data/3855544765#Place/heidelberg> ; # Heidelberg
    library:placeOfPublication <http://experiment.worldcat.org/entity/work/data/3855544765#Place/budapest> ; # Budapest
    library:placeOfPublication <http://experiment.worldcat.org/entity/work/data/3855544765#Place/hong_kong> ; # Hong Kong
    schema:about <http://experiment.worldcat.org/entity/work/data/3855544765#Topic/programmierbare_logische_anordnung_gate_array_bauelement> ; # Programmierbare logische Anordnung--Gate-Array-Bauelement
    schema:about <http://id.worldcat.org/fast/1078674> ; # Programmable array logic
    schema:about <http://experiment.worldcat.org/entity/work/data/3855544765#Place/prag_1994> ; # Prag <1994>.
    schema:about <http://experiment.worldcat.org/entity/work/data/3855544765#Topic/programmierbare_logische_anordnung> ; # Programmierbare logische Anordnung
    schema:about <http://experiment.worldcat.org/entity/work/data/3855544765#Topic/programmable_array_logic> ; # Programmable array logic
    schema:bookFormat bgn:PrintBook ;
    schema:contributor <http://viaf.org/viaf/47324055> ; # Reiner W. Hartenstein
    schema:contributor <http://experiment.worldcat.org/entity/work/data/3855544765#Organization/international_workshop_on_field_programmable_logic_and_applications> ; # International Workshop on Field Programmable Logic and Applications
    schema:datePublished "1994" ;
    schema:exampleOfWork <http://worldcat.org/entity/work/id/3855544765> ;
    schema:genre "Kongreß"@de ;
    schema:genre "Conference publication"@en ;
    schema:genre "Kongress"@de ;
    schema:genre "Conference papers and proceedings"@de ;
    schema:inLanguage "de" ;
    schema:isPartOf <http://experiment.worldcat.org/entity/work/data/3855544765#Series/lecture_notes_in_computer_science> ; # Lecture notes in computer science ;
    schema:name "Field programmable logic : architectures, synthesis and applications ; proceedings"@de ;
    schema:productID "75502358" ;
    schema:publication <http://www.worldcat.org/title/-/oclc/75502358#PublicationEvent/berlin_heidelberg_new_york_london_paris_tokyo_hong_kong_barcelona_budapest_springer_1994> ;
    schema:publisher <http://experiment.worldcat.org/entity/work/data/3855544765#Agent/springer> ; # Springer
    schema:url <http://swbplus.bsz-bw.de/bsz041021258cov.htm> ;
    schema:workExample <http://worldcat.org/isbn/9780387584195> ;
    schema:workExample <http://worldcat.org/isbn/9783540584193> ;
    umbel:isLike <http://d-nb.info/941857484> ;
    wdrs:describedby <http://www.worldcat.org/title/-/oclc/75502358> ;
    .


Related Entities

<http://dbpedia.org/resource/London> # London
    a schema:Place ;
    schema:name "London" ;
    .

<http://dbpedia.org/resource/New_York_City> # New York
    a schema:Place ;
    schema:name "New York" ;
    .

<http://experiment.worldcat.org/entity/work/data/3855544765#Organization/international_workshop_on_field_programmable_logic_and_applications> # International Workshop on Field Programmable Logic and Applications
    a schema:Organization ;
    schema:name "International Workshop on Field Programmable Logic and Applications" ;
    .

<http://experiment.worldcat.org/entity/work/data/3855544765#Series/lecture_notes_in_computer_science> # Lecture notes in computer science ;
    a bgn:PublicationSeries ;
    schema:hasPart <http://www.worldcat.org/oclc/75502358> ; # Field programmable logic : architectures, synthesis and applications ; proceedings
    schema:name "Lecture notes in computer science ;" ;
    .

<http://experiment.worldcat.org/entity/work/data/3855544765#Topic/programmierbare_logische_anordnung> # Programmierbare logische Anordnung
    a schema:Intangible ;
    schema:name "Programmierbare logische Anordnung"@de ;
    .

<http://experiment.worldcat.org/entity/work/data/3855544765#Topic/programmierbare_logische_anordnung_gate_array_bauelement> # Programmierbare logische Anordnung--Gate-Array-Bauelement
    a schema:Intangible ;
    schema:name "Programmierbare logische Anordnung--Gate-Array-Bauelement"@de ;
    .

<http://id.worldcat.org/fast/1078674> # Programmable array logic
    a schema:Intangible ;
    schema:name "Programmable array logic"@de ;
    .

<http://viaf.org/viaf/47324055> # Reiner W. Hartenstein
    a schema:Person ;
    schema:familyName "Hartenstein" ;
    schema:givenName "Reiner W." ;
    schema:name "Reiner W. Hartenstein" ;
    .

<http://worldcat.org/isbn/9780387584195>
    a schema:ProductModel ;
    schema:isbn "0387584196" ;
    schema:isbn "9780387584195" ;
    .

<http://worldcat.org/isbn/9783540584193>
    a schema:ProductModel ;
    schema:isbn "3540584196" ;
    schema:isbn "9783540584193" ;
    .

<http://www.worldcat.org/title/-/oclc/75502358>
    a genont:InformationResource, genont:ContentTypeGenericResource ;
    schema:about <http://www.worldcat.org/oclc/75502358> ; # Field programmable logic : architectures, synthesis and applications ; proceedings
    schema:dateModified "2018-05-03" ;
    void:inDataset <http://purl.oclc.org/dataset/WorldCat> ;
    .

<http://www.worldcat.org/title/-/oclc/75502358#PublicationEvent/berlin_heidelberg_new_york_london_paris_tokyo_hong_kong_barcelona_budapest_springer_1994>
    a schema:PublicationEvent ;
    schema:location <http://experiment.worldcat.org/entity/work/data/3855544765#Place/barcelona> ; # Barcelona
    schema:location <http://dbpedia.org/resource/London> ; # London
    schema:location <http://experiment.worldcat.org/entity/work/data/3855544765#Place/berlin> ; # Berlin
    schema:location <http://experiment.worldcat.org/entity/work/data/3855544765#Place/heidelberg> ; # Heidelberg
    schema:location <http://experiment.worldcat.org/entity/work/data/3855544765#Place/paris> ; # Paris
    schema:location <http://experiment.worldcat.org/entity/work/data/3855544765#Place/tokyo> ; # Tokyo
    schema:location <http://experiment.worldcat.org/entity/work/data/3855544765#Place/hong_kong> ; # Hong Kong
    schema:location <http://dbpedia.org/resource/New_York_City> ; # New York
    schema:location <http://experiment.worldcat.org/entity/work/data/3855544765#Place/budapest> ; # Budapest
    schema:organizer <http://experiment.worldcat.org/entity/work/data/3855544765#Agent/springer> ; # Springer
    schema:startDate "1994" ;
    .


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