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Formal methods in computer-aided design : second international conference, FMCAD '98, Palo Alto, CA, USA, November 4-6, 1998 : proceedings

Author: Ganesh Gopalakrishnan; Phillip J Windley
Publisher: Berlin ; New York : Springer, ©1998.
Series: Lecture notes in computer science, 1522.
Edition/Format:   eBook : Document : Conference publication : EnglishView all editions and formats
Database:WorldCat
Summary:
This book constitutes the refereed proceedings of the Second International Conference on Formal Methods in Computer-Aided Design, FMCAD '98, held in Palo Alto, California, USA, in November 1998. The 27 revised full papers presented were carefully reviewed and selected from a total of 55 submissions. Also included are four tools papers and four invited contributions. The papers present the state of the art in formal  Read more...
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Genre/Form: Electronic books
Conference papers and proceedings
Congresses
Additional Physical Format: Print version:
FMCAD '98 (1998 : Palo Alto, Calif.).
Formal methods in computer-aided design.
Berlin ; New York : Springer, ©1998
(DLC) 98046729
(OCoLC)40043692
Material Type: Conference publication, Document, Internet resource
Document Type: Internet Resource, Computer File
All Authors / Contributors: Ganesh Gopalakrishnan; Phillip J Windley
ISBN: 9783540495192 3540495193
OCLC Number: 326670232
Description: 1 online resource (ix, 528 pages) : illustrations.
Contents: Minimalist Proof Assistants: Interactions of Technology and Methodology in Formal System Level Verification.- Reducing Manual Abstraction in Formal Verification of Out- of- Order Execution.- Bit-Level Abstraction in the Verification of Pipelined Microprocessors by Correspondence Checking.- Solving Bit-Vector Equations.- The Formal Design of 1M-Gate ASICs.- Design of Experiments for Evaluation of BDD Packages Using Controlled Circuit Mutations.- A Tutorial on Stalmarck's Proof Procedure for Propositional Logic.- Almana: A BDD Minimization Tool Integrating Heuristic and RewritingMethods.- Bisimulation Minimization in an Automata-Theoretic Verification Framework.- Automatic Verification of Mixed-Level Logic Circuits.- A Timed Automaton-Based Method for Accurate Computation of Circuit Delay in the Presence of Cross-Talk.- Maximum Time Separation of Events in Cyclic Systems with Linear and Latest Timing Constraints.- Using MTBDDs for Composition and Model Checking of Real-Time Systems.- Formal Methods in CAD from an Industrial Perspective.- A Methodology for Automated Verification of Synthesized RTL Designs and Its Integration with a High-Level Synthesis Tool.- Combined Formal Post- and Presynthesis Verification in High Level Synthesis.- Formalization and Proof of a Solution to the PCI 2.1 Bus Transaction Ordering Problem.- A Performance Study of BDD-Based Model Checking.- Symbolic Model Checking Visualization.- Input Elimination and Abstraction in Model Checking.- Symbolic Simulation of the JEM1 Microprocessor.- Symbolic Simulation: An ACL2 Approach.- Verification of Data-Insensitive Circuits: An In-Order-Retirement Case Study.- Combining Symbolic Model Checking with Uninterpreted Functions for Out-of-Order Processor Verification.- Formally Verifying Data and Control with Weak Reachability Invariants.- Generalized Reversible Rules.- An Assume-Guarantee Rule for Checking Simulation.- Three Approaches to Hardware Verification: HOL, MDG, and VIS Compared.- An Instruction Set Process Calculus.- Techniques for Implicit State Enumeration of EFSMs.- Model Checking on Product Structures.- BDDNOW: A Parallel BDD Package.- Model Checking VHDL with CV.- Alexandria: A Tool for Hierarchical Verification.- PV: An Explicit Enumeration Model-Checker.
Series Title: Lecture notes in computer science, 1522.
Other Titles: FMCAD '98
Responsibility: Ganesh Gopalakrishnan, Phillip Windley (eds.).

Abstract:

Taken from a conference on formal methods in computer-aided design, the papers in this volume present the state-of-the-art in formal verification methods for digital circuits and systems, including  Read more...

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