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Formal specification and verification in VLSI design

Author: Bruce S Davie
Publisher: Edinburgh : Edinburgh University Press, ©1990.
Series: Edinburgh information technology series, 8.
Edition/Format:   Print book : EnglishView all editions and formats
Summary:

Describes an approach to computer hardware design based on behavioural hardware description languages, which enable a designer to be confident of a design's suitability at every stage of the process.  Read more...

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Additional Physical Format: Online version:
Davie, Bruce S.
Formal specification and verification in VLSI design.
Edinburgh : Edinburgh University Press, ©1990
(OCoLC)551404764
Online version:
Davie, Bruce S.
Formal specification and verification in VLSI design.
Edinburgh : Edinburgh University Press, ©1990
(OCoLC)607847137
Document Type: Book
All Authors / Contributors: Bruce S Davie
ISBN: 0748601597 9780748601592
OCLC Number: 25631748
Description: ix, 195 pages : illustrations ; 23 cm.
Contents: Hardware descriptive languages - describing behaviour; a selection of languages; CIRCAL; enhanced CIRCAL; specification techniques, SuperC; manual design; transformation; automatic design; validation - simulation; a simple computer - informal and formal specification; constraints - introductory examples and definitions; specification of constraints; the uses of constraints; constraints and SuperC.
Series Title: Edinburgh information technology series, 8.
Responsibility: Bruce S. Davie.

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