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Generating hardware assertion checkers : for hardware verification, emulation, post-fabrication debugging and on-line monitoring

Author: Marc Boulé; Zeljko Zilic
Publisher: Dordrecht : Springer, ©2008.
Edition/Format:   eBook : Document : EnglishView all editions and formats
Database:WorldCat
Summary:

This book presents an "under-the-hood" view of generating assertion checkers. It gives a unique and consistent perspective on employing assertions in such areas as specification, verification,  Read more...

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Genre/Form: Electronic books
Additional Physical Format: Print version:
Boulé, Marc, 1974-
Generating hardware assertion checkers.
[S.l.] : Springer, ©2008
(OCoLC)227032778
Material Type: Document, Internet resource
Document Type: Internet Resource, Computer File
All Authors / Contributors: Marc Boulé; Zeljko Zilic
ISBN: 9781402085857 1402085850 9781402085864 1402085869
OCLC Number: 242741899
Description: 1 online resource (xx, 279 pages)
Contents: Assertions and the Verification Landscape --
Basic Techniques Behind Assertion Checkers --
PSL and SVA Assertion Languages --
Automata for Assertion Checkers --
Construction of PSL Assertion Checkers --
Enhanced Features and Uses of PSL Checkers --
Evaluating and Verifying PSL Assertion Checkers --
Checkers for SystemVerilog Assertions --
Conclusions and Future Work.
Responsibility: Marc Boulé, Zeljko Zilic.
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Linked Data


Primary Entity

<http://www.worldcat.org/oclc/242741899> # Generating hardware assertion checkers : for hardware verification, emulation, post-fabrication debugging and on-line monitoring
    a schema:Book, schema:CreativeWork, schema:MediaObject ;
    library:oclcnum "242741899" ;
    library:placeOfPublication <http://experiment.worldcat.org/entity/work/data/802405944#Place/dordrecht> ; # Dordrecht
    library:placeOfPublication <http://id.loc.gov/vocabulary/countries/ne> ;
    schema:about <http://dewey.info/class/621.3815/e22/> ;
    schema:about <http://experiment.worldcat.org/entity/work/data/802405944#Topic/technology_&_engineering_electronics_circuits_general> ; # TECHNOLOGY & ENGINEERING--Electronics--Circuits--General
    schema:about <http://id.worldcat.org/fast/975604> ; # Integrated circuits--Very large scale integration--Computer-aided design
    schema:about <http://id.loc.gov/authorities/subjects/sh2008104741> ; # Integrated circuits--Very large scale integration--Computer-aided design
    schema:about <http://id.worldcat.org/fast/975600> ; # Integrated circuits--Verification
    schema:about <http://experiment.worldcat.org/entity/work/data/802405944#Topic/technology_&_engineering_electronics_circuits_integrated> ; # TECHNOLOGY & ENGINEERING--Electronics--Circuits--Integrated
    schema:about <http://id.worldcat.org/fast/915028> ; # Error analysis (Mathematics)
    schema:about <http://id.loc.gov/authorities/subjects/sh93005422> ; # Integrated circuits--Verification
    schema:bookFormat schema:EBook ;
    schema:contributor <http://viaf.org/viaf/31368666> ; # Zeljko Zilic
    schema:copyrightYear "2008" ;
    schema:creator <http://viaf.org/viaf/85220453> ; # Marc Boulé
    schema:datePublished "2008" ;
    schema:description "Assertions and the Verification Landscape -- Basic Techniques Behind Assertion Checkers -- PSL and SVA Assertion Languages -- Automata for Assertion Checkers -- Construction of PSL Assertion Checkers -- Enhanced Features and Uses of PSL Checkers -- Evaluating and Verifying PSL Assertion Checkers -- Checkers for SystemVerilog Assertions -- Conclusions and Future Work."@en ;
    schema:exampleOfWork <http://worldcat.org/entity/work/id/802405944> ;
    schema:genre "Electronic books"@en ;
    schema:inLanguage "en" ;
    schema:isSimilarTo <http://www.worldcat.org/oclc/227032778> ;
    schema:name "Generating hardware assertion checkers : for hardware verification, emulation, post-fabrication debugging and on-line monitoring"@en ;
    schema:productID "242741899" ;
    schema:publication <http://www.worldcat.org/title/-/oclc/242741899#PublicationEvent/dordrecht_springer_2008> ;
    schema:publisher <http://experiment.worldcat.org/entity/work/data/802405944#Agent/springer> ; # Springer
    schema:url <http://rave.ohiolink.edu/ebooks/ebc/9781402085864> ;
    schema:url <http://dx.doi.org/10.1007/978-1-4020-8586-4> ;
    schema:url <http://www.myilibrary.com?id=149230> ;
    schema:url <http://search.ebscohost.com/login.aspx?direct=true&scope=site&db=nlebk&db=nlabk&AN=229297> ;
    schema:url <http://www.springerlink.com/openurl.asp?genre=book&isbn=978-1-4020-8585-7> ;
    schema:workExample <http://worldcat.org/isbn/9781402085864> ;
    schema:workExample <http://worldcat.org/isbn/9781402085857> ;
    wdrs:describedby <http://www.worldcat.org/title/-/oclc/242741899> ;
    .


Related Entities

<http://experiment.worldcat.org/entity/work/data/802405944#Topic/technology_&_engineering_electronics_circuits_general> # TECHNOLOGY & ENGINEERING--Electronics--Circuits--General
    a schema:Intangible ;
    schema:name "TECHNOLOGY & ENGINEERING--Electronics--Circuits--General"@en ;
    .

<http://experiment.worldcat.org/entity/work/data/802405944#Topic/technology_&_engineering_electronics_circuits_integrated> # TECHNOLOGY & ENGINEERING--Electronics--Circuits--Integrated
    a schema:Intangible ;
    schema:name "TECHNOLOGY & ENGINEERING--Electronics--Circuits--Integrated"@en ;
    .

<http://id.loc.gov/authorities/subjects/sh2008104741> # Integrated circuits--Very large scale integration--Computer-aided design
    a schema:Intangible ;
    schema:name "Integrated circuits--Very large scale integration--Computer-aided design"@en ;
    .

<http://id.loc.gov/authorities/subjects/sh93005422> # Integrated circuits--Verification
    a schema:Intangible ;
    schema:name "Integrated circuits--Verification"@en ;
    .

<http://id.worldcat.org/fast/915028> # Error analysis (Mathematics)
    a schema:Intangible ;
    schema:name "Error analysis (Mathematics)"@en ;
    .

<http://id.worldcat.org/fast/975600> # Integrated circuits--Verification
    a schema:Intangible ;
    schema:name "Integrated circuits--Verification"@en ;
    .

<http://id.worldcat.org/fast/975604> # Integrated circuits--Very large scale integration--Computer-aided design
    a schema:Intangible ;
    schema:name "Integrated circuits--Very large scale integration--Computer-aided design"@en ;
    .

<http://viaf.org/viaf/31368666> # Zeljko Zilic
    a schema:Person ;
    schema:familyName "Zilic" ;
    schema:givenName "Zeljko" ;
    schema:name "Zeljko Zilic" ;
    .

<http://viaf.org/viaf/85220453> # Marc Boulé
    a schema:Person ;
    schema:familyName "Boulé" ;
    schema:givenName "Marc" ;
    schema:name "Marc Boulé" ;
    .

<http://worldcat.org/isbn/9781402085857>
    a schema:ProductModel ;
    schema:isbn "1402085850" ;
    schema:isbn "9781402085857" ;
    .

<http://worldcat.org/isbn/9781402085864>
    a schema:ProductModel ;
    schema:isbn "1402085869" ;
    schema:isbn "9781402085864" ;
    .

<http://www.worldcat.org/oclc/227032778>
    a schema:CreativeWork ;
    rdfs:label "Generating hardware assertion checkers." ;
    schema:description "Print version:" ;
    schema:isSimilarTo <http://www.worldcat.org/oclc/242741899> ; # Generating hardware assertion checkers : for hardware verification, emulation, post-fabrication debugging and on-line monitoring
    .

<http://www.worldcat.org/title/-/oclc/242741899>
    a genont:InformationResource, genont:ContentTypeGenericResource ;
    schema:about <http://www.worldcat.org/oclc/242741899> ; # Generating hardware assertion checkers : for hardware verification, emulation, post-fabrication debugging and on-line monitoring
    schema:dateModified "2016-11-24" ;
    void:inDataset <http://purl.oclc.org/dataset/WorldCat> ;
    .


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