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IEC 62530 Edition 2.0 2011-05 IEEE Std 1800 : SystemVerilog Unified Hardware Design, Specification, and Verification Language.

Publisher: [S.l.] : IEEE, 2011.
Edition/Format:   eBook : Document
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Genre/Form: Electronic books
Material Type: Document, Internet resource
Document Type: Internet Resource, Computer File
OCLC Number: 956664604
Notes: Title from content provider.
Description: 1 online resource.

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<http://www.worldcat.org/oclc/956664604> # IEC 62530 Edition 2.0 2011-05 IEEE Std 1800 : SystemVerilog Unified Hardware Design, Specification, and Verification Language.
    a schema:Book, schema:CreativeWork, schema:MediaObject ;
   library:oclcnum "956664604" ;
   library:placeOfPublication <http://experiment.worldcat.org/entity/work/data/3793283090#Place/s_l> ; # S.l.
   schema:bookFormat schema:EBook ;
   schema:datePublished "2011" ;
   schema:exampleOfWork <http://worldcat.org/entity/work/id/3793283090> ;
   schema:genre "Electronic books" ;
   schema:name "IEC 62530 Edition 2.0 2011-05 IEEE Std 1800 : SystemVerilog Unified Hardware Design, Specification, and Verification Language." ;
   schema:productID "956664604" ;
   schema:publication <http://www.worldcat.org/title/-/oclc/956664604#PublicationEvent/s_l_ieee_2011> ;
   schema:publisher <http://experiment.worldcat.org/entity/work/data/3793283090#Agent/ieee> ; # IEEE
   schema:url <http://ieeexplore.ieee.org/servlet/opac?punumber=5944938> ;
   schema:url <https://login.libproxy.uregina.ca:8443/login?url=http://ieeexplore.ieee.org/servlet/opac?punumber=5944938> ;
   wdrs:describedby <http://www.worldcat.org/title/-/oclc/956664604> ;
    .


Related Entities

<http://www.worldcat.org/title/-/oclc/956664604>
    a genont:InformationResource, genont:ContentTypeGenericResource ;
   schema:about <http://www.worldcat.org/oclc/956664604> ; # IEC 62530 Edition 2.0 2011-05 IEEE Std 1800 : SystemVerilog Unified Hardware Design, Specification, and Verification Language.
   schema:dateModified "2018-03-10" ;
   void:inDataset <http://purl.oclc.org/dataset/WorldCat> ;
    .

<https://login.libproxy.uregina.ca:8443/login?url=http://ieeexplore.ieee.org/servlet/opac?punumber=5944938>
   rdfs:comment "Full text available from IEEE/IET Electronic Library (IEL) Standards" ;
    .


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