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Integrated circuit and system design : power and timing modeling, optimization and simulation : 17th international workshop, PATMOS 2007, Gothenburg, Sweden, September 3-5, 2007 : proceedings

Author: Nadine Azemard; Lars Svensson
Publisher: Berlin ; New York : Springer, ©2007.
Series: Lecture notes in computer science, 4644.; LNCS sublibrary., SL 1,, Theoretical computer science and general issues.
Edition/Format:   Print book : Conference publication : EnglishView all editions and formats
Summary:

Papers cover high level design, low power design techniques, low power analog circuits, statistical static timing analysis, power modeling and optimization, low power routing optimization, security  Read more...

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Genre/Form: Conference papers and proceedings
Congresses
Material Type: Conference publication, Internet resource
Document Type: Book, Internet Resource
All Authors / Contributors: Nadine Azemard; Lars Svensson
ISBN: 9783540744412 354074441X
OCLC Number: 166763921
Description: xiv, 583 pages : illustrations ; 24 cm.
Contents: High-level design --
Low power design techniques --
Low power analog circuits --
Statistical static timing analysis --
Power modeling and optimization --
Low power routing optimization --
Security and asyncronous design --
Low power applications --
Posters: Modeling and optimization. High level design. Low power techniques and applications --
Keynotes --
Industrial session: design challenges in real-life.
Series Title: Lecture notes in computer science, 4644.; LNCS sublibrary., SL 1,, Theoretical computer science and general issues.
Other Titles: PATMOS 2007
Responsibility: Nadine Azemard, Lars Svensson (eds.).

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