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Introduction to VLSI systems : a logic, circuit, and system perspective

Author: Ming-Bo Lin
Publisher: Boca Raton, FL : CRC Press, ©2012.
Edition/Format:   eBook : Document : EnglishView all editions and formats
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Genre/Form: Electronic books
Electronic book
Additional Physical Format: Print version:
Lin, Ming-Bo.
Introduction to VLSI systems.
Boca Raton, FL : CRC Press, ©2012
(DLC) 2011030501
(OCoLC)690084627
Material Type: Document, Internet resource
Document Type: Internet Resource, Computer File
All Authors / Contributors: Ming-Bo Lin
ISBN: 143986859X 9781439868591
OCLC Number: 861618443
Description: 1 online resource (xxix, 885 pages) : illustrations 1 online resource (xxix, 857 pages) : illustrations
Contents: IntroductionMOS Transistors as SwitchesVLSI Design and FabricationImplementation Options of Digital SystemsFundamentals of MOS TransistorsSemiconductor Fundamentals The pn Junction MOS Transistor Theory Advanced Features of MOS Transistors SPICE and Modeling Fabrication of CMOS ICs Basic Processes Materials and Their Applications Process Integration Enhancements of CMOS Processes and DevicesLayout DesignsLayout Design Rules CMOS Latch-Up and Prevention Layout Designs Layout Methods for Complex Logic Gates Delay Models and Path-Delay Optimization Resistance and Capacitance of MOS TransistorsPropagation Delays and Delay Models Path-Delay Optimization Power Dissipation and Low-Power DesignsPower Dissipation Principles of Low-Power Logic Designs Low-Power Logic Architectures Power ManagementStatic Logic CircuitsBasic Static Logic CircuitsSingle-Rail Logic CircuitsDual-Rail Logic CircuitsDynamic Logic CircuitsIntroduction to Dynamic Logic Nonideal Effects of Dynamic Logic Single-Rail Dynamic LogicDual-Rail Dynamic LogicClocked CMOS LogicSequential Logic DesignsSequential Logic Fundamentals Memory Elements Timing Issues in Clocked Systems Pipeline SystemsDatapath Subsystem DesignsBasic Combinational Components Basic Sequential Components Shifters Addition/Subtraction Multiplication Division Memory SubsystemsIntroduction Static Random-Access Memory Dynamic Random-Access Memory Read-Only Memory Nonvolatile Memory Other Memory DevicesDesign Methodologies and Implementation OptionsDesign Methodologies and Implementation Architectures Synthesis Flows Implementation Options of Digital Systems A Case Study | A Simple Start/Stop Timer InterconnectRLC Parasitics Interconnect and Simulation Models Parasitic Effects of Interconnect Transmission-Line Models Advanced Topics Power Distribution and Clock DesignsPower Distribution Networks Clock Generation and Distribution Networks Phase-Locked Loops/Delay-Locked Loops Input/Output Modules and ESD Protection NetworksGeneral Chip OrganizationsOutput Drivers/Buffers Electrostatic Discharge Protection Networks Testing, Verification, and Testable DesignsAn Overview of VLSI Testing Fault Models Automatic Test Pattern Generation Testable Circuit Designs System-Level Testing An Introduction to Verilog HDL/SystemVerilogIntroduction Behavioral Modeling Hierarchical Structural Modeling Combinational Logic Modules Sequential Logic Modules SynthesisVerification A Start/Stop Timer Index
Responsibility: Ming-Bo Lin.

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