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Itanium architecture for programmers : understanding 64-bit processors and EPIC principles

Author: James S Evans; Gregory L Trimper
Publisher: Upper Saddle River, NJ : Prentice Hall PTR, ©2003.
Series: Hewlett-Packard professional books.
Edition/Format:   Print book : EnglishView all editions and formats

Offers a comprehensive introduction to the capabilities of the 64-bit Itanium architecture. Suitable for both computing professionals and students of architecture or assembly language, this book  Read more...


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Additional Physical Format: Online version:
Evans, James S.
Itanium architecture for programmers.
Upper Saddle River, NJ : Prentice Hall PTR, ©2003
Document Type: Book
All Authors / Contributors: James S Evans; Gregory L Trimper
ISBN: 0131013726 9780131013728
OCLC Number: 51653098
Description: xxxiv, 529 pages : illustrations ; 24 cm.
Contents: (NOTE: Each chapter concludes with Summary, References, and Exercises.) List of Figures. List of Tables. Preface. Acknowledgments. Trademarks. 1. Architecture and Implementation. Analogy: Piano Architecture. Types of Computer Languages. Why Study Assembly Language? Prefixes for Binary Multiples. Instruction Set Architectures. The Life Cycle of Computer Architectures. SQUARES: A First Programming Example. Review of Number Systems. 2. Computer Structures and Data Representations. Computer Structures. Instruction Execution. Classes of Instruction Set Architectures. Migration to 64-Bit Architectures. Itanium Information Units and Data Types. 3. The Program Assembler and Debugger. Programming Environments. Program Development Steps. Comparing Variants of a Source File. Assembler Statement Types. The Functions of a Symbolic Assembler. The Assembly Process. The Linking Process. The Program Debugger. Conventions for Writing Programs. 4. Itanium Instruction Formats and Addressing. Overview of Itanium Instruction Formats. Integer Arithmetic Instructions. Bit Encoding for Itanium Instructions. HEXNUM: Using Arithmetic Instructions. Data Access Instructions. Other ALU Instructions. DOTPROD: Using Data Access Instructions. Itanium Addressing Modes. Addressing in Other Architectures. 5. Comparison, Branches, and Predication. Hardware Basis for Control of Flow. Integer Compare Instructions. Program Branching. DOTLOOP: Using a Counted Loop. Stops, Instruction Groups, and Performance. DOTCLOOP: Using the Loop Count Register. Other Structured Programming Constructs. MAXIMUM: Using Conditional Instructions. 6. Logical Operations, Bit-Shifts, and Bytes. Logical Functions. HEXNUM2: Using Logical Masks. Bit and Field Operations. SCANTEXT: Processing Bytes. Integer Multiplication and Division. DECNUM: Converting an Integer to Decimal Format. Using C for ASCII Input and Output. BACKWARD: Using Byte Manipulations. 7. Subroutines, Procedures, and Functions. Memory Stacks. DECNUM2: Using Stack Operations. Register Stacks. Program Segmentation. Calling Conventions. DECNUM3 and BOOTH: Making a Function. Integer Quotients and Remainders. RANDOM: A Callable Function. 8. Floating-Point Operations. Parallels Between Integer and Floating-Point Instructions. Representations of Floating-Point Values. Copying Floating-Point Data. Floating-Point Arithmetic Instructions. HORNER: Evaluating a Polynomial. Predication Based on Floating-Point Values. Integer Operations in Floating-Point Execution Units. Approximations for Reciprocals and Square Roots. APPROXPI: Using Floating-Point Instructions. 9. Input and Output of Text. File Systems. Keyboard and Display I/O. SCANTERM: Using C Standard I/O. SORTSTR: Sorting Strings. Text File I/O. SCANFILE: Input and Output with Files. SORTINT: Sorting Integers from a File. Binary Files. 10. Performance Considerations. Processor-Level Parallelism. Instruction-Level Parallelism. Explicit Parallelism in the Itanium Processors. Software-Pipelined Loops. Modulo Scheduling a Loop. Program Optimization Factors. Fibonacci Numbers. 11. Looking at Output from Compilers. Compilers for RISC-like Systems. Compiling a Simple Program. Optimizing a Simple Program. Inline Optimizations. Profile-Guided or Other Optimizations. Debugging Optimized Programs. Recursion for Fibonacci Numbers Revisited. 12. Parallel Operations. Classification of Computing Systems. Integer Parallel Operations. Applications to Integer Multiplication. Opportunities and Challenges. Floating-Point Parallel Operations. Semaphore Support for Parallel Processes. 13. Variations among Implementations. Why Implementations Change. How Implementations Change. The Original Itanium Processor. A Major Role for Software. IA-32 Instruction Set Mode. Determining Extensions and Implementation Version. Appendix A: Command-Line Environments. References. Exercises. Appendix B: Suggested System Resources. System Hardware. SystemSoftware. Desktop Client Access Software. References. Appendix C: Itanium Instruction Set. C-1Instructions Listed by Function. C-2Instructions Listed by Assembler Opcode. References. Appendix D: Itanium Registers and Their Uses. Instruction Pointer. General Registers and NaT Bits. Predicate Registers. Branch Registers. Floating-Point Registers. Application Registers. State Management Registers. System Information Registers. System Control Registers. References. Appendix E: Conditional Assembly and Macros (GCC Assembler). Interference from Explicit Stops. Repeat Blocks. Conditional Assembly. Macro Processing. Using Labels with Macros. Recursive Macros. Object File Sections. MONEY: A Macro Illustrating Sections. Summary. References. Exercises. Appendix F: Inline Assembly. HP-UX C Compilers. GCC Compiler for Linux. Intel Compilers for Linux. References. Bibliography. Answers and Hints for Selected Exercises. About the Authors. Index.
Series Title: Hewlett-Packard professional books.
Responsibility: James S. Evans, Gregory L. Trimper.


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