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Nanometer technology designs : high-quality delay tests

Author: Mohammad H Tehranipoor; Nisar Ahmed
Publisher: New York, NY : Springer, ©2008.
Edition/Format:   Print book : EnglishView all editions and formats
Summary:

Traditional at-speed test methods cannot guarantee high quality test results as they face many new challenges. Supply noise effects on chip performance, high test pattern volume, small delay defect  Read more...

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Document Type: Book
All Authors / Contributors: Mohammad H Tehranipoor; Nisar Ahmed
ISBN: 9780387764863 0387764860
OCLC Number: 183259720
Description: xvii, 281 pages : illustrations ; 25 cm
Contents: Introduction to path delay and transition delay fault models and test methods.- At-speed test challenges for nanometer technology designs.- Low-cost tester friendly design-for-test techniques.- Improving test quality of current at-speed test methods.- Functionally untestable fault list generation and avoidance.- Timing-based ATPG for screening small delay faults.- Faster-than-at-speed test considering IR-drop effects.- IR-drop tolerant at-speed test pattern generation and application.
Responsibility: Mohammad Tehranipoor, Nisar Ahmed.

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