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Network-on-Chip architectures : a holistic design exploration

Author: Chrysostomos Nicopoulos; Vijaykrishnan Narayanan; Chita R Das
Publisher: Dordrecht : Springer, ©2009.
Series: Lecture notes in electrical engineering, v. 45.
Edition/Format:   Print book : EnglishView all editions and formats
Summary:

NoC architectures are seen as a possible solution to burgeoning global wiring delays in many-core chips, and this work deals with the main issues that need to be resolved in performance, energy  Read more...

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Material Type: Internet resource
Document Type: Book, Internet Resource
All Authors / Contributors: Chrysostomos Nicopoulos; Vijaykrishnan Narayanan; Chita R Das
ISBN: 9789048130306 9048130301
OCLC Number: 401159430
Description: xxi, 223 pages : illustrations ; 24 cm.
Contents: Abstract. Acknowledgments. 1. Introduction. 2. A Baseline NoC Architecture Part I MICRO-Architectural Exploratioin 3. ViChaR: A Dynamic Virtual Channel Regulator for NoC Routers. 4. RoCo: The Row-Column Decoupled Router. 5. Exploring Fault-Tolerant Network-on-Chip Architectures. 6. On the Effects of Process Variation in Network-on-Chip Architectures. Part II MACRO-Architectural Exploration 7. The Quest for Scalable On-Chip Interconnection Networks. 8. Design and Management of 3D Chip Multiprocessors Using Network-In-Memory (NetInMem). 9. A Novel Dimensionally-Decomposed Router for On-Chip Communication in 3D Architectures. 10. Digest of Additional NoC MACRO-Architectural Research. 11. Conclusions & Future Work. References.
Series Title: Lecture notes in electrical engineering, v. 45.
Responsibility: Chrysostomos Nicopoulos, Vijaykrishnan Narayanan, Chita R. Das.
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