skip to content
Power and timing modelling for performance of integrated circuits : proceedings of the Third International Workshop on Power and Timing Modelling and Optimization (PATMOS '93), Oct. 11-12, 1993, La Grande Motte, France Preview this item
ClosePreview this item
Checking...

Power and timing modelling for performance of integrated circuits : proceedings of the Third International Workshop on Power and Timing Modelling and Optimization (PATMOS '93), Oct. 11-12, 1993, La Grande Motte, France

Author: Daniel Auvergne; Reiner Hartenstein
Publisher: Bruchsal : IT Press Verlag, 1993.
Edition/Format:   Print book : Conference publication : English : 1. Aufl
Summary:
"Fast advances in technology raise new challenges to physical design of integrated circuits and systems. High circuit density and increasing importance of battery-operated applications stress emphasis in system performances not only timing constraints but also power constraints to be considered at every stage of physical design. Regularly decreasing feature size leads to dense circuits in which high complexity  Read more...
Rating:

(not yet rated) 0 with reviews - Be the first.

Subjects
More like this

Find a copy online

Find a copy in the library

&AllPage.SpinnerRetrieving; Finding libraries that hold this item...

Details

Genre/Form: Conference papers and proceedings
Congresses
Material Type: Conference publication, Internet resource
Document Type: Book, Internet Resource
All Authors / Contributors: Daniel Auvergne; Reiner Hartenstein
ISBN: 3929814048 9783929814040
OCLC Number: 31905742
Description: 248 pages : illustrations ; 23 cm
Other Titles: Power and timing modeling
Responsibility: edited by Daniel Auvergne, Reiner Hartenstein.

Abstract:

"Fast advances in technology raise new challenges to physical design of integrated circuits and systems. High circuit density and increasing importance of battery-operated applications stress emphasis in system performances not only timing constraints but also power constraints to be considered at every stage of physical design. Regularly decreasing feature size leads to dense circuits in which high complexity combined with highly limited power dissipation must not sacrifice computational knowledge. The objective of this book is to provide a summary of important more recent research in this rapidly changing field. A major emphasis is put on modelling and characterisation mehtods allowing performance-driven design for advanced technologies"--Page 4 of cover.

Reviews

User-contributed reviews
Retrieving GoodReads reviews...
Retrieving DOGObooks reviews...

Tags

Be the first.
Confirm this request

You may have already requested this item. Please select Ok if you would like to proceed with this request anyway.

Linked Data


Primary Entity

<http://www.worldcat.org/oclc/31905742> # Power and timing modelling for performance of integrated circuits : proceedings of the Third International Workshop on Power and Timing Modelling and Optimization (PATMOS '93), Oct. 11-12, 1993, La Grande Motte, France
    a schema:CreativeWork, schema:Book ;
   library:oclcnum "31905742" ;
   library:placeOfPublication <http://experiment.worldcat.org/entity/work/data/4160890075#Place/bruchsal> ; # Bruchsal
   library:placeOfPublication <http://id.loc.gov/vocabulary/countries/gw> ;
   schema:about <http://experiment.worldcat.org/entity/work/data/4160890075#Topic/integrierte_schaltung> ; # Integrierte Schaltung
   schema:about <http://id.worldcat.org/fast/975609> ; # Integrated circuits--Very large scale integration--Design--Data processing
   schema:about <http://experiment.worldcat.org/entity/work/data/4160890075#Topic/computer_aided_design> ; # Computer-aided design
   schema:about <http://experiment.worldcat.org/entity/work/data/4160890075#Topic/computer_aided_design_congresses> ; # Computer-aided design--Congresses
   schema:about <http://dewey.info/class/621.3815/e21/> ;
   schema:about <http://experiment.worldcat.org/entity/work/data/4160890075#Topic/integrated_circuits_very_large_scale_integration_design_data_procesing_congresses> ; # Integrated circuits--Very large scale integration--Design--Data procesing--Congresses
   schema:about <http://experiment.worldcat.org/entity/work/data/4160890075#Place/lagrande_motte_1993> ; # LaGrande-Motte <1993>
   schema:about <http://id.worldcat.org/fast/872701> ; # Computer-aided design
   schema:about <http://experiment.worldcat.org/entity/work/data/4160890075#Topic/integrated_circuits_very_large_scale_integration_design_data_processing> ; # Integrated circuits--Very large scale integration--Design--Data processing
   schema:alternateName "Power and timing modeling" ;
   schema:bookEdition "1. Aufl." ;
   schema:bookFormat bgn:PrintBook ;
   schema:contributor <http://viaf.org/viaf/694697> ; # Daniel Auvergne
   schema:contributor <http://viaf.org/viaf/47324055> ; # Reiner Hartenstein
   schema:creator <http://experiment.worldcat.org/entity/work/data/4160890075#Meeting/patmos_workshop_3rd_1993_la_grande_motte_france> ; # PATMOS (Workshop) (3rd : 1993 : La Grande Motte, France)
   schema:datePublished "1993" ;
   schema:description ""Fast advances in technology raise new challenges to physical design of integrated circuits and systems. High circuit density and increasing importance of battery-operated applications stress emphasis in system performances not only timing constraints but also power constraints to be considered at every stage of physical design. Regularly decreasing feature size leads to dense circuits in which high complexity combined with highly limited power dissipation must not sacrifice computational knowledge. The objective of this book is to provide a summary of important more recent research in this rapidly changing field. A major emphasis is put on modelling and characterisation mehtods allowing performance-driven design for advanced technologies"--Page 4 of cover."@en ;
   schema:exampleOfWork <http://worldcat.org/entity/work/id/4160890075> ;
   schema:genre "Conference papers and proceedings"@en ;
   schema:genre "Conference publication"@en ;
   schema:inLanguage "en" ;
   schema:name "Power and timing modelling for performance of integrated circuits : proceedings of the Third International Workshop on Power and Timing Modelling and Optimization (PATMOS '93), Oct. 11-12, 1993, La Grande Motte, France"@en ;
   schema:productID "31905742" ;
   schema:publication <http://www.worldcat.org/title/-/oclc/31905742#PublicationEvent/bruchsal_it_press_verlag_1993> ;
   schema:publisher <http://experiment.worldcat.org/entity/work/data/4160890075#Agent/it_press_verlag> ; # IT Press Verlag
   schema:url <http://www.gbv.de/dms/tib-ub-hannover/043288839.pdf> ;
   schema:url <http://bvbr.bib-bvb.de:8991/F?func=service&doc_library=BVB01&doc_number=010196877&line_number=0001&func_code=DB_RECORDS&service_type=MEDIA> ;
   schema:workExample <http://worldcat.org/isbn/9783929814040> ;
   umbel:isLike <http://d-nb.info/931745772> ;
   wdrs:describedby <http://www.worldcat.org/title/-/oclc/31905742> ;
    .


Related Entities

<http://experiment.worldcat.org/entity/work/data/4160890075#Agent/it_press_verlag> # IT Press Verlag
    a bgn:Agent ;
   schema:name "IT Press Verlag" ;
    .

<http://experiment.worldcat.org/entity/work/data/4160890075#Meeting/patmos_workshop_3rd_1993_la_grande_motte_france> # PATMOS (Workshop) (3rd : 1993 : La Grande Motte, France)
    a bgn:Meeting, schema:Event ;
   schema:location <http://experiment.worldcat.org/entity/work/data/4160890075#Place/la_grande_motte_france> ; # La Grande Motte, France)
   schema:name "PATMOS (Workshop) (3rd : 1993 : La Grande Motte, France)" ;
    .

<http://experiment.worldcat.org/entity/work/data/4160890075#Place/la_grande_motte_france> # La Grande Motte, France)
    a schema:Place ;
   schema:name "La Grande Motte, France)" ;
    .

<http://experiment.worldcat.org/entity/work/data/4160890075#Place/lagrande_motte_1993> # LaGrande-Motte <1993>
    a schema:Place ;
   schema:name "LaGrande-Motte <1993>" ;
    .

<http://experiment.worldcat.org/entity/work/data/4160890075#Topic/computer_aided_design_congresses> # Computer-aided design--Congresses
    a schema:Intangible ;
   schema:name "Computer-aided design--Congresses"@en ;
    .

<http://experiment.worldcat.org/entity/work/data/4160890075#Topic/integrated_circuits_very_large_scale_integration_design_data_procesing_congresses> # Integrated circuits--Very large scale integration--Design--Data procesing--Congresses
    a schema:Intangible ;
   schema:name "Integrated circuits--Very large scale integration--Design--Data procesing--Congresses"@en ;
    .

<http://experiment.worldcat.org/entity/work/data/4160890075#Topic/integrated_circuits_very_large_scale_integration_design_data_processing> # Integrated circuits--Very large scale integration--Design--Data processing
    a schema:Intangible ;
   schema:hasPart <http://id.loc.gov/authorities/subjects/sh85067125> ;
   schema:name "Integrated circuits--Very large scale integration--Design--Data processing"@en ;
    .

<http://experiment.worldcat.org/entity/work/data/4160890075#Topic/integrierte_schaltung> # Integrierte Schaltung
    a schema:Intangible ;
   schema:name "Integrierte Schaltung"@en ;
    .

<http://id.worldcat.org/fast/872701> # Computer-aided design
    a schema:Intangible ;
   schema:name "Computer-aided design"@en ;
    .

<http://id.worldcat.org/fast/975609> # Integrated circuits--Very large scale integration--Design--Data processing
    a schema:Intangible ;
   schema:name "Integrated circuits--Very large scale integration--Design--Data processing"@en ;
    .

<http://viaf.org/viaf/47324055> # Reiner Hartenstein
    a schema:Person ;
   schema:familyName "Hartenstein" ;
   schema:givenName "Reiner" ;
   schema:name "Reiner Hartenstein" ;
    .

<http://viaf.org/viaf/694697> # Daniel Auvergne
    a schema:Person ;
   schema:familyName "Auvergne" ;
   schema:givenName "Daniel" ;
   schema:name "Daniel Auvergne" ;
    .

<http://worldcat.org/isbn/9783929814040>
    a schema:ProductModel ;
   schema:isbn "3929814048" ;
   schema:isbn "9783929814040" ;
    .

<http://www.worldcat.org/title/-/oclc/31905742>
    a genont:InformationResource, genont:ContentTypeGenericResource ;
   schema:about <http://www.worldcat.org/oclc/31905742> ; # Power and timing modelling for performance of integrated circuits : proceedings of the Third International Workshop on Power and Timing Modelling and Optimization (PATMOS '93), Oct. 11-12, 1993, La Grande Motte, France
   schema:dateModified "2018-03-10" ;
   void:inDataset <http://purl.oclc.org/dataset/WorldCat> ;
    .


Content-negotiable representations

Close Window

Please sign in to WorldCat 

Don't have an account? You can easily create a free account.