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Quantifying Locality in the Memory Access Patterns of HPCApplications

Author: Erich StrohmaierAllan SnavelyJonathan WeinbergMichael O McCrackenLawrence Berkeley National Laboratory.All authors
Publisher: Berkeley, Calif. : Lawrence Berkeley National Laboratory ; Oak Ridge, Tenn. : Distributed by the Office of Scientific and Technical Information, U.S. Dept. of Energy, 2005.
Edition/Format:   eBook : Document : Conference publication : National government publication : EnglishView all editions and formats
Database:WorldCat
Summary:
Several benchmarks for measuring memory performance of HPC systems along dimensions of spatial and temporal memory locality have recently been proposed. However, little is understood about the relationships of these benchmarks to real applications and to each other. In this paper, we propose a methodology for producing architecture-neutral characterizations of the spatial and temporal locality exhibited by the  Read more...
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Additional Physical Format: Print version:
Weinberg, Jonathan.
Quantifying locality in the memory access patterns of HPC applications.
2005
(OCoLC)62172068
Material Type: Conference publication, Document, Government publication, National government publication, Internet resource
Document Type: Internet Resource, Computer File
All Authors / Contributors: Erich Strohmaier; Allan Snavely; Jonathan Weinberg; Michael O McCracken; Lawrence Berkeley National Laboratory.; United States. Department of Energy. Office of Scientific and Technical Information.; USDOE Director. Office of Science. Office of AdvancedScientific Computing Research.; National Science Foundation CNS-0406312,Pittsburgh Superconducting Center NSF NRAC Award.
OCLC Number: 316323614
Notes: Published through the Information Bridge: DOE Scientific and Technical Information.
07/25/2005.
"LBNL--58441."
": KJ0101030."
SC 2005, Seattle, WA, Nov 12-18,2005.
Strohmaier, Erich; Snavely, Allan; Weinberg, Jonathan; McCracken, Michael O.
USDOE Director. Office of Science. Office of AdvancedScientific Computing Research.
National Science Foundation CNS-0406312,Pittsburgh Superconducting Center NSF NRAC Award.
Reproduction Notes: Electronic reproduction. [S.l.] : HathiTrust Digital Library, 2011. MiAaHDL
Description: 1 online resource (x, 40 leaves) : ill. (some col.)
Details: Mode of access: World Wide Web.; Master and use copy. Digital master created according to Benchmark for Faithful Digital Reproductions of Monographs and Serials, Version 1. Digital Library Federation, December 2002.

Abstract:

Several benchmarks for measuring memory performance of HPC systems along dimensions of spatial and temporal memory locality have recently been proposed. However, little is understood about the relationships of these benchmarks to real applications and to each other. In this paper, we propose a methodology for producing architecture-neutral characterizations of the spatial and temporal locality exhibited by the memory access patterns of applications. We demonstrate that the results track intuitive notions of spatial and temporal locality on several synthetic and application benchmarks. We employ the methodology to analyze the memory performance components of the HPC Challenge Benchmarks, the Apex-MAP benchmark, and their relationships to each other and other benchmarks and applications. We show that this analysis can be used to both increase understanding of the benchmarks and enhance their usefulness by mapping them, along with applications, to a 2-D space along axes of spatial and temporal locality.

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