skip to content
Specification and analysis of system architecture using Rapide. Preview this item
ClosePreview this item
Checking...

Specification and analysis of system architecture using Rapide.

Author: David C LuckhamLarry M AugustinJohn J KenneyJames VeraDoug BryanAll authors
Publisher: April 1994.
Edition/Format:   Print book : Conference publication : English
Database:WorldCat
Summary:
Sparse distributed memory is a generalized random-access memory (RAM) for long (e.g., 1,000 bit) binary words. Such words can be written into and read from the memory, and they can also be used to address the memory. The main attribute of the memory is sensitivity to similarity, meaning that a word can be read back not only by giving the original write address but also by giving one close to it as measured by the
Rating:

(not yet rated) 0 with reviews - Be the first.

Subjects
More like this

 

Find a copy online

Links to this item

Find a copy in the library

&AllPage.SpinnerRetrieving; Finding libraries that hold this item...

Details

Material Type: Conference publication, Internet resource
Document Type: Book, Internet Resource
All Authors / Contributors: David C Luckham; Larry M Augustin; John J Kenney; James Vera; Doug Bryan; Walter Mann; Stanford University. Computer Systems Laboratory.; Stanford University. Computer Systems Laboratory. Program Analysis and Verification Group.
OCLC Number: 123336724
Notes: [Adminitrivia V1/Prg/19941108].
Description: 61 pages

Abstract:

Sparse distributed memory is a generalized random-access memory (RAM) for long (e.g., 1,000 bit) binary words. Such words can be written into and read from the memory, and they can also be used to address the memory. The main attribute of the memory is sensitivity to similarity, meaning that a word can be read back not only by giving the original write address but also by giving one close to it as measured by the Hamming distance between addresses.

Large memories of this kind are expected to have wide use in speech recognition and scene analysis, in signal detection and verification, and in adaptive control of automated equipment---in general, in dealing with real-world information in real time. The memory can be realized as a simple, massively parallel computer. Digital technology has reached a point where building large memories is becoming practical. This research project is aimed at resolving major design issues that have to be faced in building the memories. This report describes the design of a prototype memory with 256-bit addresses and from 8K to 128K locations for 256-bit words. A key aspect of the design is extensive use of dynamic RAM and other standard components.

Reviews

User-contributed reviews
Retrieving GoodReads reviews...
Retrieving DOGObooks reviews...

Tags

Be the first.
Confirm this request

You may have already requested this item. Please select Ok if you would like to proceed with this request anyway.

Linked Data


Primary Entity

<http://www.worldcat.org/oclc/123336724> # Specification and analysis of system architecture using Rapide.
    a schema:CreativeWork, schema:Book ;
   library:oclcnum "123336724" ;
   schema:about <http://experiment.worldcat.org/entity/work/data/2044265368#Thing/architecture> ; # Architecture.
   schema:about <http://experiment.worldcat.org/entity/work/data/2044265368#Thing/prototyping> ; # Prototyping.
   schema:about <http://experiment.worldcat.org/entity/work/data/2044265368#Thing/concurrency> ; # Concurrency.
   schema:about <http://experiment.worldcat.org/entity/work/data/2044265368#Thing/partial_orders> ; # Partial orders.
   schema:about <http://experiment.worldcat.org/entity/work/data/2044265368#Thing/real_time> ; # Real-time.
   schema:about <http://experiment.worldcat.org/entity/work/data/2044265368#Thing/event_patterns> ; # Event patterns.
   schema:about <http://experiment.worldcat.org/entity/work/data/2044265368#Thing/rapide> ; # Rapide.
   schema:about <http://experiment.worldcat.org/entity/work/data/2044265368#Thing/formal_constraints> ; # Formal constraints.
   schema:about <http://experiment.worldcat.org/entity/work/data/2044265368#Thing/programming_languages> ; # Programming languages.
   schema:bookFormat bgn:PrintBook ;
   schema:contributor <http://experiment.worldcat.org/entity/work/data/2044265368#Person/kenney_john_j> ; # John J. Kenney
   schema:contributor <http://viaf.org/viaf/44924748> ; # David C. Luckham
   schema:contributor <http://experiment.worldcat.org/entity/work/data/2044265368#Person/mann_walter> ; # Walter Mann
   schema:contributor <http://viaf.org/viaf/149020926> ; # Stanford University. Computer Systems Laboratory. Program Analysis and Verification Group.
   schema:contributor <http://viaf.org/viaf/165181991> ; # Doug Bryan
   schema:contributor <http://viaf.org/viaf/11471259> ; # Larry M. Augustin
   schema:contributor <http://experiment.worldcat.org/entity/work/data/2044265368#Person/vera_james> ; # James Vera
   schema:creator <http://viaf.org/viaf/149020926> ; # Stanford University. Computer Systems Laboratory. Program Analysis and Verification Group.
   schema:datePublished "Aril 1994" ;
   schema:datePublished "1994" ;
   schema:description "Large memories of this kind are expected to have wide use in speech recognition and scene analysis, in signal detection and verification, and in adaptive control of automated equipment---in general, in dealing with real-world information in real time. The memory can be realized as a simple, massively parallel computer. Digital technology has reached a point where building large memories is becoming practical. This research project is aimed at resolving major design issues that have to be faced in building the memories. This report describes the design of a prototype memory with 256-bit addresses and from 8K to 128K locations for 256-bit words. A key aspect of the design is extensive use of dynamic RAM and other standard components."@en ;
   schema:description "Sparse distributed memory is a generalized random-access memory (RAM) for long (e.g., 1,000 bit) binary words. Such words can be written into and read from the memory, and they can also be used to address the memory. The main attribute of the memory is sensitivity to similarity, meaning that a word can be read back not only by giving the original write address but also by giving one close to it as measured by the Hamming distance between addresses."@en ;
   schema:exampleOfWork <http://worldcat.org/entity/work/id/2044265368> ;
   schema:genre "Conference publication"@en ;
   schema:inLanguage "en" ;
   schema:name "Specification and analysis of system architecture using Rapide."@en ;
   schema:productID "123336724" ;
   schema:publication <http://www.worldcat.org/title/-/oclc/123336724#PublicationEvent/april_1994> ;
   schema:url <http://library.stanford.edu/depts/mathcs/mathcscoll/techreports.html> ;
   wdrs:describedby <http://www.worldcat.org/title/-/oclc/123336724> ;
    .


Related Entities

<http://experiment.worldcat.org/entity/work/data/2044265368#Person/kenney_john_j> # John J. Kenney
    a schema:Person ;
   schema:familyName "Kenney" ;
   schema:givenName "John J." ;
   schema:name "John J. Kenney" ;
    .

<http://experiment.worldcat.org/entity/work/data/2044265368#Person/mann_walter> # Walter Mann
    a schema:Person ;
   schema:familyName "Mann" ;
   schema:givenName "Walter" ;
   schema:name "Walter Mann" ;
    .

<http://experiment.worldcat.org/entity/work/data/2044265368#Thing/formal_constraints> # Formal constraints.
    a schema:Thing ;
   schema:name "Formal constraints." ;
    .

<http://experiment.worldcat.org/entity/work/data/2044265368#Thing/programming_languages> # Programming languages.
    a schema:Thing ;
   schema:name "Programming languages." ;
    .

<http://viaf.org/viaf/11471259> # Larry M. Augustin
    a schema:Person ;
   schema:familyName "Augustin" ;
   schema:givenName "Larry M." ;
   schema:name "Larry M. Augustin" ;
    .

<http://viaf.org/viaf/149020926> # Stanford University. Computer Systems Laboratory. Program Analysis and Verification Group.
    a schema:Organization ;
   schema:name "Stanford University. Computer Systems Laboratory. Program Analysis and Verification Group." ;
   schema:name "Stanford University. Computer Systems Laboratory." ;
    .

<http://viaf.org/viaf/165181991> # Doug Bryan
    a schema:Person ;
   schema:familyName "Bryan" ;
   schema:givenName "Doug" ;
   schema:name "Doug Bryan" ;
    .

<http://viaf.org/viaf/44924748> # David C. Luckham
    a schema:Person ;
   schema:familyName "Luckham" ;
   schema:givenName "David C." ;
   schema:name "David C. Luckham" ;
    .


Content-negotiable representations

Close Window

Please sign in to WorldCat 

Don't have an account? You can easily create a free account.