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Systematic design for optimisation of pipelined ADCs

Author: João Goes; João C Vital; José Franca
Publisher: New York : Kluwer Academic Publishers, ©2003.
Series: Kluwer international series in engineering and computer science, SECS 607.; Kluwer international series in engineering and computer science., Analog circuits and signal processing.
Edition/Format:   eBook : Document : EnglishView all editions and formats
Summary:
Systematic Design for Optimisation of Pipelined ADCs proposes and develops new strategies, methodologies and tools for designing low-power and low-area CMOS pipelined A/D converters. The task is tackled by following a scientifically-consistent approach. First of all, the state of the art in pipeline A/D converters is analysed with a double purpose: a) to identify the best suited among different strategies reported  Read more...
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Details

Genre/Form: Electronic books
Material Type: Document, Internet resource
Document Type: Internet Resource, Computer File
All Authors / Contributors: João Goes; João C Vital; José Franca
ISBN: 9780306481932 0306481936
OCLC Number: 71229287
Description: 1 online resource (xv, 160 pages) : illustrations.
Series Title: Kluwer international series in engineering and computer science, SECS 607.; Kluwer international series in engineering and computer science., Analog circuits and signal processing.
Responsibility: by João Goes, João C. Vital, and José Franca.

Abstract:

Systematic Design for Optimisation of Pipelined ADCs proposes and develops new strategies, methodologies and tools for designing low-power and low-area CMOS pipelined A/D converters. The task is tackled by following a scientifically-consistent approach. First of all, the state of the art in pipeline A/D converters is analysed with a double purpose: a) to identify the best suited among different strategies reported in literature and taking into account the objectives pursued; b) to identify the drawbacks of these strategies as a basic first step to improve them. Then, the book proposes a top-down design approach for implementing high-performance low-power and low-area CMOS pipelined A/D converters through: The conception, development and implementation of self-calibrated techniques to extend the linearity of some critical stages in the architecture of pipelined ADCs. The detailed analysis and modelling of some major non-idealities that limit the physical realisation of pipelined ADCs and the proposal, development and implementation of design methodologies to support systematic design of optimised instances of these converters which combine maximum performance with minimum power dissipation and minimum area occupation. /LIST Several implementations together with consistent measured results are presented. In particular, a practical realisation of a low-power 14-bit 5MS/s CMOS pipelined ADC with background analogue self-calibration is fully described. The proposed approach is fully in line with the best practice regarding the design of mixed-signal integrated circuits. On the one hand, drawbacks of currently existing solutions are overcame through innovative strategies and, on the other hand, the expert knowledge is packaged and made available for re-usability by the community of circuit designers. Finally, feasibility of the strategies and the associated encapsulated knowledge is granted through experimental validation of working silicon. Systematic Design for Optimisation of Pipelined ADCs serves as an excellent reference for analogue design engineers especially designers of low-power CMOS A/D converters. The book may also be used as a text for advanced reading on the subject.

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