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Verilog and System Verilog gotchas : 101 common coding errors and how to avoid them

Author: Stuart Sutherland; Don Mills
Publisher: New York : Springer, ©2007.
Edition/Format:   Print book : EnglishView all editions and formats
Database:WorldCat
Summary:

This book will help engineers write better Verilog/SystemVerilog design and verification code as well as deliver digital designs to market more quickly. It shows over 100 common coding mistakes that  Read more...

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Material Type: Internet resource
Document Type: Book, Internet Resource
All Authors / Contributors: Stuart Sutherland; Don Mills
ISBN: 9780387717142 0387717145 1441944028 9781441944023
OCLC Number: 154711862
Description: xxii, 214 pages : illustrations ; 24 cm
Contents: Introduction : What is a gotcha? --
Declaration and literal number gotchas --
RTL modeling gotchas --
Operator gotchas --
Programming gotchas --
Object oriented and multi-threaded programming gotchas --
Randomization, coverage and assertion gotchas --
Tool compatibility gotchas.
Other Titles: Verilog gotchas
System Verilog gotchas
Responsibility: Stuart Sutherland, Don Mills.
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Primary Entity

<http://www.worldcat.org/oclc/154711862> # Verilog and System Verilog gotchas : 101 common coding errors and how to avoid them
    a schema:Book, schema:CreativeWork ;
   library:oclcnum "154711862" ;
   library:placeOfPublication <http://id.loc.gov/vocabulary/countries/nyu> ;
   library:placeOfPublication <http://dbpedia.org/resource/New_York_City> ; # New York
   schema:about <http://dewey.info/class/621.39028553/e23/> ;
   schema:about <http://id.worldcat.org/fast/1165388> ; # Verilog (Computer hardware description language)
   schema:alternateName "Verilog gotchas" ;
   schema:alternateName "System Verilog gotchas" ;
   schema:bookFormat bgn:PrintBook ;
   schema:contributor <http://experiment.worldcat.org/entity/work/data/1081808047#Person/mills_don> ; # Don Mills
   schema:copyrightYear "2007" ;
   schema:creator <http://experiment.worldcat.org/entity/work/data/1081808047#Person/sutherland_stuart_1953> ; # Stuart Sutherland
   schema:datePublished "2007" ;
   schema:description "Introduction : What is a gotcha? -- Declaration and literal number gotchas -- RTL modeling gotchas -- Operator gotchas -- Programming gotchas -- Object oriented and multi-threaded programming gotchas -- Randomization, coverage and assertion gotchas -- Tool compatibility gotchas."@en ;
   schema:exampleOfWork <http://worldcat.org/entity/work/id/1081808047> ;
   schema:inLanguage "en" ;
   schema:name "Verilog and System Verilog gotchas : 101 common coding errors and how to avoid them"@en ;
   schema:productID "154711862" ;
   schema:publication <http://www.worldcat.org/title/-/oclc/154711862#PublicationEvent/new_york_springer_2007> ;
   schema:publisher <http://experiment.worldcat.org/entity/work/data/1081808047#Agent/springer> ; # Springer
   schema:url <http://catdir.loc.gov/catdir/enhancements/fy1301/2007926706-t.html> ;
   schema:workExample <http://worldcat.org/isbn/9781441944023> ;
   schema:workExample <http://worldcat.org/isbn/9780387717142> ;
   wdrs:describedby <http://www.worldcat.org/title/-/oclc/154711862> ;
    .


Related Entities

<http://dbpedia.org/resource/New_York_City> # New York
    a schema:Place ;
   schema:name "New York" ;
    .

<http://experiment.worldcat.org/entity/work/data/1081808047#Person/sutherland_stuart_1953> # Stuart Sutherland
    a schema:Person ;
   schema:birthDate "1953" ;
   schema:familyName "Sutherland" ;
   schema:givenName "Stuart" ;
   schema:name "Stuart Sutherland" ;
    .

<http://id.worldcat.org/fast/1165388> # Verilog (Computer hardware description language)
    a schema:Intangible ;
   schema:name "Verilog (Computer hardware description language)"@en ;
    .

<http://worldcat.org/isbn/9780387717142>
    a schema:ProductModel ;
   schema:isbn "0387717145" ;
   schema:isbn "9780387717142" ;
    .

<http://worldcat.org/isbn/9781441944023>
    a schema:ProductModel ;
   schema:isbn "1441944028" ;
   schema:isbn "9781441944023" ;
    .

<http://www.worldcat.org/title/-/oclc/154711862>
    a genont:InformationResource, genont:ContentTypeGenericResource ;
   schema:about <http://www.worldcat.org/oclc/154711862> ; # Verilog and System Verilog gotchas : 101 common coding errors and how to avoid them
   schema:dateModified "2016-05-09" ;
   void:inDataset <http://purl.oclc.org/dataset/WorldCat> ;
    .


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