skip to content
VHDL : modular design and synthesis of cores and systems Preview this item
ClosePreview this item
Checking...

VHDL : modular design and synthesis of cores and systems

Author: Zainalabedin Navabi
Publisher: New York, NY : McGraw-Hill, 2007
Edition/Format:   Book : English : 3. edView all editions and formats
Database:WorldCat
Summary:

Learn how to utilize VHDL to create constructs for hardware parts, focusing on VHDL's libraries and packages. This book features a toolkit for register-transfer level digital system design and  Read more...

Rating:

(not yet rated) 0 with reviews - Be the first.

Subjects
More like this

 

Find a copy in the library

&AllPage.SpinnerRetrieving; Finding libraries that hold this item...

Details

Document Type: Book
All Authors / Contributors: Zainalabedin Navabi
ISBN: 0071475451 9780071475457
OCLC Number: 488794946
Notes: 2nd ed. has subtitle: analysis and modeling of digital systems
Description: xviii, 531 p.
Contents: Preface Introduction Acknowledgments Chapter 1: Digital System Design Automation with VHDL Chapter 2: RTL with VHDL Chapter 3: VHDL Constructs for Structure and Hierarchy Descriptions Chapter 4: Concurrent Constructs for RT Level Descriptions Chapter 5: Sequential Constructs for RT Level Descriptions Chapter 6: VHDL Language Utilities and Packages Chapter 7: VHDL Signal Model Chapter 8: Hardware Cores and Models Chapter 9: Core Design and Testability Chapter 10: Design, Test and Application of a Processor Core APPENDIX A: VHDL KEYWORDS APPENDIX B: VHDL LANGUAGE GRAMMAR APPENDIX C: VHDL STANDARD PACKAGES APPENDIX D: STD_LOGIC_1164 Package APPENDIX E: STD_LOGIC_TEXTIO Package APPENDIX F: STD_LOGIC_ARITH Package APPENDIX G: STD_LOGIC_SIGNED APPENDIX H: STD_LOGIC_UNSIGNED APPENDIX I: math_real Package INDEX
Responsibility: Zainalabedin Navabi

Reviews

User-contributed reviews
Retrieving GoodReads reviews...
Retrieving DOGObooks reviews...

Tags

All user tags (3)

View most popular tags as: tag list | tag cloud

  • bf2010  (by 1 person)
  • es  (by 1 person)
  • int l  (by 1 person)
Confirm this request

You may have already requested this item. Please select Ok if you would like to proceed with this request anyway.

Linked Data


<http://www.worldcat.org/oclc/488794946>
library:oclcnum"488794946"
library:placeOfPublication
library:placeOfPublication
rdf:typeschema:Book
schema:about
<http://id.worldcat.org/fast/1163476>
rdf:typeschema:Intangible
schema:name"VHDL (Computer hardware description language)"
schema:about
<http://id.loc.gov/authorities/subjects/sh87006330>
rdf:typeschema:Intangible
schema:name"Digital integrated circuits--Design and construction--Data processing."
schema:about
<http://id.worldcat.org/fast/893697>
rdf:typeschema:Intangible
schema:name"Digital integrated circuits--Design and construction--Data processing"
schema:bookEdition"3. ed."
schema:creator
schema:datePublished"2007"
schema:exampleOfWork<http://worldcat.org/entity/work/id/198627526>
schema:inLanguage"en"
schema:name"VHDL : modular design and synthesis of cores and systems"
schema:numberOfPages"531"
schema:publication
schema:publisher
schema:workExample
wdrs:describedby

Content-negotiable representations

Close Window

Please sign in to WorldCat 

Don't have an account? You can easily create a free account.