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VLSI-SoC : from systems to silicon : IFIP TC 10, WG 10.5, Thirteenth International Conference on Very Large Scale Integration of System on Chip (VLSI-SoC 2005), October 17-19, 2005, Perth, Australia

Author: Ricardo A L Reis; Adam Osseiran; H -J Pfleiderer
Publisher: New York : Springer, ©2007.
Series: International Federation for Information Processing (Series), 240.
Edition/Format:   eBook : Document : Conference publication : EnglishView all editions and formats
Summary:
This book contains extended and revised versions of the best papers that were presented during the thirteenth edition of the IFIP TC 10 International Conference on Very Large Scale Integration, a Global System-on-Chip Design and CAD conference. The purpose of this conference is to provide a forum to exchange ideas and show industrial and academic research results in the field of microelectronics design. The current  Read more...
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Genre/Form: Electronic books
Conference papers and proceedings
Congresses
Additional Physical Format: Print version:
IFIP TC10/WG10.5 International Conference on Very Large Scale Integration of Systems-on-Chip (13th : 2005 : Perth, Australia).
VLSI-SoC.
New York : Springer, ©2007
(DLC) 2007930377
(OCoLC)182731933
Material Type: Conference publication, Document, Internet resource
Document Type: Internet Resource, Computer File
All Authors / Contributors: Ricardo A L Reis; Adam Osseiran; H -J Pfleiderer
ISBN: 9780387736617 0387736611 9780387736600 0387736603
OCLC Number: 184985032
Description: 1 online resource (x, 344 pages) : illustrations.
Contents: Molecular electronics-devices and circuits technology / Paul Franzon [and others] --
Improving DPA resistance of quasi delay insensitive circuits using randomly time-shifted acknowledgement signals / Fraidy Bouesse, Marc Renaudin and Gilles Sicard --
A comparison of layout implementations of pipelined and non-pipelined signed radix-4 array multiplier and modified booth multiplier architectures / Leonardo L. de Oliveira [and others] --
Defragmentation algorithms for partially reconfigurable hardware / Markus Koester [and others] --
Technology mapping for area optimized quasi delay insensitive circuits / Bertrand Folco [and others] --
3D-SoftChip: A novel 3D vertically integrated adaptive computing system / Chul Kim [and others] --
Caronte: A methodology for the implementation of partially dynamically self-reconfiguring systems on FPGA platforms / Alberto Donato [and others] --
A methodology for reliability enhancement of nanometer-scale digital systems based on a-priori functional fault-tolerance analysis / Milos Stanisavljevic, Alexandre Schmid and Yusuf Leblebici --
Issues in model reduction of power grids / João M.S. Silva and L. Miguel Silveira --
A traffic injection methodology with support for system-level synchronization / Shankar Mahadevan [and others] --
Pareto points in SRAM design using the sleepy stack approach / Jun Cheol Park and Vincent Mooney III --
Modeling the traffic effect for the application cores mapping problem onto NoCs / César A.M. Marcon [and others] --
Modular asynchronous network-on-chip: application to GALS systems rapid prototyping / Jérôme Quartana, Laurent Fesquet and Marc Renaudin --
A novel MicroPhotonic structure for optical header recognition / Muhsen Aljada [and others] --
Combined test data selection and scheduling for test quality optimization under ATE memory depth constraint / Erik Larsson and Stina Edbom --
On-chip pseudorandom testing for linear and nonlinear MEMS / Achraf Dhayni [and others] --
Scan cell reordering for peak Power reduction during scan test cycles / N. Badereddine [and others] --
On the design of A dynamically reconfigurable function-unit for error detection and correction / Thilo Pionteck [and others] --
Exact BDD minimization for path-related objective functions / Rüdiger Ebend and Rolf Drechsler --
Current mask generation: an analog circuit to thwart DPA attacks / Daniel Mesquita [and others] --
A transistor placement technique using genetic algorithm and analytical programming / Cristiano Lazzari, Lorena Anghel and Ricardo A.L. Reis.
Series Title: International Federation for Information Processing (Series), 240.
Other Titles: From systems to silicon
Very large scale integration of system on chip
VLSI-SoC 2005
Responsibility: edited by Ricardo Reis, Adam Osseiran, Hans-Joerg Pfleiderer.

Abstract:

This book contains extended and revised versions of the best papers that were presented during the thirteenth edition of the IFIP TC 10 International Conference on Very Large Scale Integration, a  Read more...

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