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VLSI test principles and architectures : design for testability

Author: Laung-Terng Wang; Cheng-Wen Wu, EE Ph. D.; Xiaoqing Wen
Publisher: Amsterdam ; Boston : Elsevier Morgan Kaufmann Publishers, ©2006.
Series: Morgan Kaufmann series in systems on silicon.
Edition/Format:   eBook : Document : EnglishView all editions and formats
Database:WorldCat
Summary:
This book is a comprehensive guide to new DFT methods that will show the readers how to design a testable and quality product, drive down test cost, improve product quality and yield, and speed up time-to-market and time-to-volume. Most up-to-date coverage of design for testability. Coverage of industry practices commonly found in commercial DFT tools but not discussed in other books. Numerous, practical examples in  Read more...
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Genre/Form: Electronic books
Additional Physical Format: Print version:
VLSI test principles and architectures.
Amsterdam ; Boston : Elsevier Morgan Kaufmann Publishers, ©2006
(DLC) 2006006869
(OCoLC)64624834
Material Type: Document, Internet resource
Document Type: Internet Resource, Computer File
All Authors / Contributors: Laung-Terng Wang; Cheng-Wen Wu, EE Ph. D.; Xiaoqing Wen
ISBN: 9780080474793 0080474799
OCLC Number: 162573568
Description: 1 online resource (xxx, 777 pages) : illustrations.
Contents: Design for testability / Laung-Terng (L.-T.) Wang, Xiaoqing Wen, and Khader S. Abdel-Hafez --
Logic and fault simulation / Jiun-Lang Huang, James C.-M. Li, and Duncan M. (Hank) Walker --
Test generation / Michael S. Hsiao --
Logic built-in self-test / Laung-Terng (L.-T.) Wang --
Test compression / Xiaowei Li, Kuen-Jong Lee, and Nur A. Touba --
Logic diagnosis / Shi-Yu Huang --
Memory testing and built-in self-test / Cheng-Wen Wu --
Memory diagnosis and built-in self-repair / Cheng-Wen Wu --
Boundary scan and core-based testing / Kuen-Jong Lee --
Analog and mixed-signal testing / Chauchin Su --
Test technology trends in the nanometer age / Kwang-Ting (Tim) Cheng, Wen-Ben Jone, and Laung-Terng (L.-T.) Wang.
Series Title: Morgan Kaufmann series in systems on silicon.
Responsibility: edited by Laung-Terng Wang, Cheng-Wen Wu, Xiaoqing Wen.
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Abstract:

A comprehensive guide to DFT methods that shows the readers how to design a testable and quality product, drive down test cost, improve product quality and yield, and speed up time-to-market and  Read more...

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In the era of large systems embedded in a single system-on-chip (SOC) and fabricated continuously shrinking technologies, it is important to ensure correct behavior of the whole system. Electronic Read more...

 
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