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Wave Pipelining: Theory and CMOS Implementation

Author: C Thomas Gray; Wentai Liu; Ralph K Cavin
Publisher: Boston, MA : Springer US, 1994.
Series: Kluwer international series in engineering and computer science., VLSI, computer architecture, and digital signal processing ;, 248.
Edition/Format:   eBook : Document : EnglishView all editions and formats
Summary:
Wave Pipelining: Theory and CMOS Implementation provides a coherent presentation of the theory of wave pipelined operation of digital circuits and discusses practical design techniques for the realization of wave pipelined circuits in CMOS technology. Wave pipeling is a timing methodology used in digital systems to enhance performance while conserving the number of data registers used. This is achieved by applying  Read more...
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Details

Genre/Form: Electronic books
Additional Physical Format: Print version:
Material Type: Document, Internet resource
Document Type: Internet Resource, Computer File
All Authors / Contributors: C Thomas Gray; Wentai Liu; Ralph K Cavin
ISBN: 9781461532064 146153206X
OCLC Number: 851731748
Description: 1 online resource (xviii, 206 pages).
Contents: 1 Introduction and Motivation --
1.1 Wave Pipelining --
1.2 History --
1.3 Designing Wave Pipelined Circuits --
1.4 Organization --
2 Clock Period Constraints: Single Stage Systems --
2.1 Introduction --
2.2 System Model --
2.3 Constraints for Correct Clocking --
2.4 Minimizing the Clock Period --
2.5 The Parameter k --
2.6 Special Cases --
2.7 Conclusions --
3 Clock Period Constraints: Multiple Stage Systems --
3.1 Introduction --
3.2 System Model --
3.3 Constraints for Correct Clocking --
3.4 Example --
3.5 Conclusions --
4 Exact Timing Analysis --
4.1 Introduction --
4.2 Motivation and Justification --
4.3 Complexity of Problem --
4.4 Notation and Model --
4.5 Basic Algorithm Development --
4.6 Conclusion --
5 Exact Timing Analysis: Algorithm --
5.1 Introduction --
5.2 Algorithm Strategy --
5.3 Calculation of Output Responses --
5.4 Verification of Output Responses --
5.5 Detection of Components --
5.6 Vector Reporting --
5.7 Implementation --
5.8 Limitations and Extensions --
5.9 Conclusion --
6 Practical Considerations in Wave Pipelining --
6.1 Architecture Choice --
6.2 Path Delay Variation --
6.3 Circuit Choice --
6.4 Parametric Variations due to Manufacturing and Environmen-tal Factors --
6.5 Clock Distribution and Physical Layout --
6.6 Technology Scaling --
6.7 Conclusion --
7 Design Examples --
7.1 Introduction --
7.2 Parallel-Carry Adder --
7.3 Sampler --
7.4 Conclusion --
8 Conclusions --
A Example Model File --
B Calculation of Tolerance of Parametric Variations --
References.
Series Title: Kluwer international series in engineering and computer science., VLSI, computer architecture, and digital signal processing ;, 248.
Responsibility: by C. Thomas Gray, Wentai Liu, Ralph K. Cavin.

Abstract:

Wave pipelining (also known as maximal rate pipelining) is a timing method- ology used in digital systems to increase the number of effective pipeline stages without increasing the number of physical  Read more...

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