skip to content

Piguet, Christian

Overview
Works: 36 works in 125 publications in 3 languages and 2,116 library holdings
Genres: Conference papers and proceedings 
Roles: Author, Editor, 956, Thesis advisor, 958, Opponent
Publication Timeline
Key
Publications about Christian Piguet
Publications by Christian Piguet
Most widely held works by Christian Piguet
Low-power electronics design by Christian Piguet( Book )
18 editions published between 2004 and 2017 in English and held by 221 libraries worldwide
The power consumption of integrated circuits is one of the most problematic considerations affecting the design of high-performance chips and portable devices. The study of power-saving design methodologies now must also include subjects such as systems on chips, embedded software, and the future of microelectronics. Low-Power Electronics Design overs all major aspects of low-power design of ICs in deep submicron technologies and addresses emerging topics related to future design. This volume explores, in individual chapters written by expert authors, the many low-power techniques born during the past decade. It also discusses the many different domains and disciplines that impact power consumption, including processors, complex circuits, software, CAD tools, and energy sources and management. The authors delve into what many specialists predict about the future by presenting techniques that are promising but are not yet reality. They investigate nanotechnologies, optical circuits, ad hoc networks, e-textiles, as well as human powered sources of energy.; Low-Power Electronics Design delivers a complete picture of today's methods for reducing power, and also illustrates the advances in chip design that may be commonplace 10 or 15 years from now
Low-power CMOS circuits : technology, logic design and CAD tools by Christian Piguet( Book )
15 editions published between 2005 and 2006 in English and held by 119 libraries worldwide
"Providing detailed examinations contributed by leading experts, Low-Power CMOS Circuits: Technology, Logic Design and CAD Tools supplies authoritative information on how to design and model for high performance with low power consumption in modern integrated circuits. It is a must-read for anyone designing modern computers or embedded systems."--Jacket
Du zéro à l'ordinateur : une brève histoire du calcul by Christian Piguet( Book )
4 editions published in 2004 in French and held by 113 libraries worldwide
Ce livre expose de manière claire et progressive la façon dont sont nées les idées qui ont conduit à la réalisation des ordinateurs et des microprocesseurs actuels. Il offre au lectuer les clés lui permettant de mieux comprendre la nature et le fonctionnement de ces machines. Histoire des chiffres , Histoire des machines à calculer et des automates , Histoire des machines à calculer électroniques , Histoire des ordinateurs , Histoire de la programmation , Histoire des microprocesseurs
Designing CMOS circuits for low power by Dimitrios Soudris( Book )
5 editions published in 2002 in English and held by 103 libraries worldwide
Low-power processors and systems on chips by Christian Piguet( Book )
13 editions published between 2005 and 2006 in English and held by 78 libraries worldwide
The power consumption of microprocessors is one of the most important challenges of high-performance chips and portable devices. In chapters drawn from Piguet's recently published Low-Power Electronics Design, this volume addresses the design of low-power microprocessors in deep submicron technologies. It provides a focused reference for specialists involved in systems-on-chips, from low-power microprocessors to DSP cores, reconfigurable processors, memories, ad-hoc networks, and embedded software. Low-Power Processors and Systems on Chips is organized into three broad sections for convenient access. The first section examines the design of digital signal processors for embedded applications and techniques for reducing dynamic and static power at the electrical and system levels. The second part describes several aspects of low-power systems on chips, including hardware and embedded software aspects, efficient data storage, networks-on-chips, and applications such as routing strategies in wireless RF sensing and actuating devices. The final section discusses embedded software issues, including details on compilers, retargetable compilers, and coverification tools. Providing detailed examinations contributed by leading experts, Low-Power Processors and Systems on Chips supplies authoritative information on how to maintain high performance while lowering power consumption in modern processors and SoCs. It is a must-read for anyone designing modern computers or embedded systems
Conception des circuits ASIC numériques CMOS by Christian Piguet( Book )
2 editions published in 1990 in Undetermined and French and held by 51 libraries worldwide
VLSI-SoC : design methodologies for SOC and SIP : 16th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2008, Rhodes Island, Greece, October 13-15, 2008 : revised selected papers by Christian Piguet( Book )
17 editions published between 2010 and 2014 in English and held by 40 libraries worldwide
This book contains extended and revised versions of the best papers presented at the 16th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2008, held in Rhodes Island, Greece, in October 2008. The 14 papers presented together with an invited contribution were carefully selected from 56 papers. The papers cover a wide variety of excellence in VLSI technology and advanced research in the fields of VLSI/ULSI systems, embedded systems, and microelectronic design and test
Synthèse de circuits ASIC : des choix méthodologiques aux applications industrielles by Christian Piguet( Book )
4 editions published in 1990 in French and held by 33 libraries worldwide
Design technology for heterogeneous embedded systems by G Nicolescu( Book )
10 editions published between 2011 and 2012 in English and held by 33 libraries worldwide
Annotation
Leakage models for high level power estimation by Domenik Helms( file )
1 edition published in 2009 in English and held by 30 libraries worldwide
In heutigen sub-100nm CMOS Systemen sind Leckströme von hoher Bedeutung. Diese können auf Transistorebene langsam aber genau (BSIM oder PSP) und auf der Gatter-Ebene schneller aber unter Vernachlässigung wichtiger Parameter (Liberty) vorhergesagt werden. In dieser Arbeit werden Modelle auf RT Ebene entwickelt, die schneller als bisherige Gatter Modelle aber nahezu so genau wie Transistormodelle sind. Dafür wird eine Modellhierarchie von einfachen Transistorbeschreibungen über Gattermodelle bis hin zu RT Soft Makros entwickelt, in der alle wesentlichen Parameter entweder zur nächsten Ebene durchgereicht (und sind dann bis hin zur Systemebene verfügbar) oder, wo möglich, implizit in die Modelle integriert werden. Diese Modelle sind millionenfach schneller als SPICE aber innerhalb von 3.6% - 6.9% Standardabweichung für eine weite Spanne an Temperaturen, Betriebsspannungen und Prozessvariationen. <dt.>
PATMOS '95 : Power and timing modeling for performance of integrated circuits ( Book )
3 editions published in 1995 in English and held by 14 libraries worldwide
This book contains contributions to the 1995 PATMOS Workshop on Power and Timing Modeling for Performance of Integrated Circuits, held at OFFIS, Oldenburg, Germany. For five years the PATMOS series of annual workshops is the traditional European forum to discuss modeling, optimization and simulation of ICs at the physical and logical level. Outstanding scientific contributions are mixed with informal discussions and stimulating panel sessions. Topics of the 1995 workshop include: self-timed design, delay modeling, adder and algorithms optimization, low-power logic design, power estimation, glitch and short-circuit power dissipation, low-power multipliers, parasitic coupling and interconnections, low-power design and reliability, and CAD tools for low-power. <dt.>
Synthèse de systèmes logiques asynchrones à l'aide des propriétés des fonctions logiques décroissantes by Christian Piguet( Book )
5 editions published in 1981 in French and held by 10 libraries worldwide
L'aventure de la montre à quartz : mutation technologique initiée par le Centre électronique horloger, Neuchâtel ( Book )
1 edition published in 2002 in French and held by 5 libraries worldwide
Design technology for heterogeneous embedded systems by G Nicolescu( file )
2 editions published in 2012 in English and held by 5 libraries worldwide
Designing technology to address the problem of heterogeneous embedded systems, while remaining compatible with standard "More Moore" flows, i.e. capable of handling simultaneously both silicon complexity and system complexity, represents one of the most important challenges facing the semiconductor industry today. While the micro-electronics industry has built its own specific design methods to focus mainly on the management of complexity through the establishment of abstraction levels, the emergence of device heterogeneity requires new approaches enabling the satisfactory design of physically heterogeneous embedded systems for the widespread deployment of such systems. This book, compiled largely from a set of contributions from participants of past editions of the Winter School on Heterogeneous Embedded Systems Design Technology (FETCH), proposes a broad and holistic overview of design techniques used to tackle the various facets of heterogeneity in terms of technology and opportunities at the physical level, signal representations and different abstraction levels, architectures and components based on hardware and software, in all the main phases of design (modeling, validation with multiple models of computation, synthesis and optimization). It concentrates on the specific issues at the interfaces, and is divided into two main parts. The first part examines mainly theoretical issues and focuses on the modeling, validation and design techniques themselves. The second part illustrates the use of these methods in various design contexts at the forefront of new technology and architectural developments
Architecture d'alimentation à récupération d'énergie et gestion évenementielle pour les systèmes de capteurs communicants autonomes by Jean-Frédéric Christmann( file )
1 edition published in 2013 in French and held by 3 libraries worldwide
Wireless Sensor Networks (WSN) development leverages recent progress in electronic devices power consumption and in energy harvesting technologies in order to create smart sensing structures useful for improvements in various topics such as health monitoring or farming. Thanks to wireless communication circuits lower power consumption, it becomes possible to create networks of sensing systems capable of extracting information from the environment and of transmitting data through the network to the global intelligence. Because of hard and costly maintenance requirements, limited lifespans batteries are a brake on such networks development. Thanks to environmental energy harvesting on solar, thermal or mechanical sources, a system containing sensors and a wireless communication circuit can be powered. Global energy autonomy is thus improved and the node's life is enhanced. Works done during this PhD aim to study energy management within a sensing wireless communicating node. Thanks to the use of advanced multiple power paths architecture leveraging direct power path between the sources and the power loads, the power management system can optimize its energy efficiency when energy is harvested in the environment. Nevertheless, a precise digital control is mandatory to continuously determine the best power path between the energy harvesters, the energy storing capacitors and batteries, and the power loads. An integrated asynchronous controller implements an event-driven management of the power paths and gives the system robustness to environmental energy variations. After modeling and analyzing the power efficiency gain granted by the advanced architecture, an event-driven controller is proposed to ease implementation of wireless sensing applications. The controller is implemented in asynchronous quasi delay insensitive (QDI) logic and presents high intrinsic robustness to environemental variations while maintaining ultra low power consumption. A power management circuit suited for wireless sensing systems is thus fabricated using 180nm CMOS process and includes both architecture and digital management innovations. Its global power consumption close to 1µW allows considering the creation of wireless sensing nodes running for applications in the range of microwatts, consequently enabling development of ultra low power wireless sensor networks
Optimisation de l'efficacité énergétique des applications numériques en technologie FD-SOI 28-14nm by Bertrand Pelloux-Prayer( file )
1 edition published in 2014 in French and held by 3 libraries worldwide
Ces dix dernières années, la miniaturisation des transistors MOS en technologie planaire sur silicium massif connait une augmentation considérable des effets parasites liés à la réduction de la longueur du canal. Ces effets canaux courts ont pour conséquence de dégrader les performances des transistors, rendant les circuits moins efficaces énergétiquement et plus sensibles aux phénomènes de fluctuations des procédés de fabrication. Ainsi, cette technologie fait face à une vraie barrière pour les noeuds inférieurs à 32nm.Pour répondre aux besoins des dispositifs mobiles alliant hautes performances et basse consommation, la technologie planaire sur isolant complètement désertée (FD-SOI pour Fully depleted Silicon-On-Insulator) apparaît comme une solution adaptée. En effet, grâce à son film de silicium mince et non dopé, le transistor MOS dispose d'un meilleur contrôle électrostatique du canal et d'une faible variabilité de sa tension de seuil. De plus, cette technologie offre la possibilité de moduler la tension de seuil des transistors grâce à une polarisation étendue à ±3V des caissons situés sous la fine couche d'oxyde enterré. Ainsi, cette spécificité apporte aux concepteurs de circuits intégrés un levier supplémentaire permettant de moduler les performances d'un circuit ainsi que d'en optimiser son efficacité énergétique.Le travail de recherche de thèse présenté dans ce mémoire a contribué au développement de la plateforme technologique FD-SOI pour les noeuds 28 puis 14nm. Dans un premier temps, l'exploitation d'un chemin critique extrait d'un coeur de processeur ARM Cortex-A9 a permis d'évaluer à la fois les gains intrinsèques apportés par la technologie FD-SOI ainsi que ceux produits par la modulation de la tension de seuil des transistors par polarisation du substrat. Cette technique permet ainsi de diviser jusqu'à 50 fois le courant statique d'un circuit lorsqu'il est inactif, ou encore par 2 l'énergie totale nécessaire à fréquence constante. Ces nombreuses analyses ont permis, dans un second temps, de proposer plusieurs solutions de conception visant une nouvelle fois à optimiser l'efficacité énergétique des circuits intégrés. Parmi celles-ci, la conception d'une structure à caisson unique permet notamment de résoudre les difficultés de co-intégration multi-VT classique, présentes en FD-SOI. Cette approche offre également aux concepteurs une solution performante pour les circuits fonctionnant avec une très large gamme de tensions d'alimentation. En effet, à l'aide d'une seule tension de substrat, les transistors n et p-MOS peuvent être simultanément rééquilibrés permettant ainsi de réduire fortement la tension minimale d'alimentation du circuit
Architectures intégrées de gestion de l'énergie pour les microsystèmes autonomes by Guy Waltisperger( file )
1 edition published in 2011 in French and held by 3 libraries worldwide
Enhancing the life time of battery or being able to work without it is today mandatory for microsystems. Most of systems are nowadays limited by the capacity of the embedded battery. Moreover the replacement and waste of baterries is no more possible at this scale. One way to achieve longer life time is the use of renewable energy sources (solar, thermal, or kinetic). This work proposes to develop a new energy harvesting platform with numerous sources and loads (MANAGY) able to adapt itself to the surrounding environment in order to extract the maximum of energy while answering to various of applications. The architecture is composed of directs and indirects power paths where the extracted energy coming from renewable sources is firstly transferred to a storage unit before being used by loads. This novel architecture makes it possible to optimize the energy transfer between sources and loads and to achieve a 33% gain. Before developing this architecture with numerous sources, we have searched to enhance the efficiency of the photovoltaic source which has the best power density at the state of the art. Looking for improving the efficiency of the PV source is the same as tracking the maximum power point (MPPT). There is for each irradiance, temperature and quantity of energy extracted a couple of voltage and current enabling the PV source to deliver the maximum of power (MPP). Thanks to the two power paths used we are able to create a low power feedback loop adjusting the duty cycle from the power management unit (MPPT) while having a second feedback loop optimizing the power transfer and regulating the output voltage. Thanks to a high level model we have specified the system performances. To achieve the performances required we have realized novel architectures protected through three patents. Moreover, blocs are only activated when the system changes its state and furthermore there are designs, when achievable, with transistors working in weak inversion. All these optimizations make the system working for a large range of irradiance (from inside conditions higher than 500 lux to outdoor conditions) with an efficiency close to 90%
Di gong hao CMOS dian lu she ji : Luo ji she ji yu CAD gong ju ( Book )
1 edition published in 2011 in Chinese and held by 2 libraries worldwide
Computer and computing technologies in agriculture III : third IFIP TC 12 international conference ; revised selected papers by Daoliang Li( file )
1 edition published in 2010 in English and held by 0 libraries worldwide
This book constitutes the thoroughly refereed post-conference proceedings of the Third IFIP TC 12 International Conference on Computer and Computing Technologies in Agriculture, CCTA 2009, held in Beijing, China, in October 2009. The 80 revised papers were carefully selected from numerous submissions. The papers cover a wide range of interesting theories and applications of information technology in agriculture, including simulation models and decision-support systems for agricultural production, agricultural product quality testing, traceability and e-commerce technology, the application of i
 
moreShow More Titles
fewerShow Fewer Titles
Languages
English (85)
French (18)
Chinese (1)
Covers
Close Window

Please sign in to WorldCat 

Don't have an account? You can easily create a free account.