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Piguet, Christian

Works: 37 works in 109 publications in 3 languages and 1,922 library holdings
Genres: Conference proceedings 
Roles: Author, Editor, 956
Classifications: TK7874.75, 621.395
Publication Timeline
Publications about Christian Piguet
Publications by Christian Piguet
Most widely held works by Christian Piguet
Design technology for heterogeneous embedded systems by G Nicolescu( file )
8 editions published between 2011 and 2012 in English and held by 368 libraries worldwide
Low-power electronics design by Christian Piguet( Book )
14 editions published between 2004 and 2005 in English and held by 352 libraries worldwide
The power consumption of integrated circuits is one of the most problematic considerations affecting the design of high-performance chips and portable devices. The study of power-saving design methodologies now must also include subjects such as systems on chips, embedded software, and the future of microelectronics. Low-Power Electronics Design covers all major aspects of low-power design of ICs in deep submicron technologies and addresses emerging topics related to future design. This volume explores, in individual chapters written by expert authors, the many low-power techniques born during
Low-power CMOS circuits technology, logic design and CAD tools by Christian Piguet( file )
17 editions published between 2005 and 2006 in English and held by 226 libraries worldwide
The power consumption of integrated circuits (ICs) is considered one of the most important challenges of high-performance chips and of portable devices. In chapters drawn from Piguet's recently published Low-Power Electronics Design, this sharply focused volume covers all the low-level aspects of the design of low-power ICs in deep submicron technologies. It describes existing and future very deep submicron technologies as well as some completely different technologies, such as nanoelectronics and optical chips that hold potential. The second part of the book describes techniques for reducing power consumption at the low level, and the final section presents CAD tools used to design low-power ICs
Low-power processors and systems on chips by Christian Piguet( file )
12 editions published between 2005 and 2006 in English and held by 191 libraries worldwide
Piguet (Centre Suisse d'Electronique et de Microtechnique, Switzerland) has taken the parts of his larger text, Low-Power Electronics Design (2004), that cover aspects of the design of low-power microprocessors in deep submicron technologies. The topics addressed include the design of low-power processors and systems-on-chips from microprocessors
Du zéro à l'ordinateur : une brève histoire du calcul by Christian Piguet( Book )
3 editions published in 2004 in French and held by 113 libraries worldwide
Designing CMOS circuits for low power by Dimitrios Soudris( Book )
4 editions published in 2002 in English and held by 100 libraries worldwide
Conception des circuits ASIC numériques CMOS by Christian Piguet( Book )
2 editions published in 1990 in Undetermined and French and held by 49 libraries worldwide
Synthèse de circuits ASIC : des choix méthodologiques aux applications industrielles by Christian Piguet( Book )
3 editions published in 1990 in French and held by 32 libraries worldwide
Leakage models for high level power estimation by Domenik Helms( Archival Material )
1 edition published in 2009 in English and held by 12 libraries worldwide
In heutigen sub-100nm CMOS Systemen sind Leckströme von hoher Bedeutung. Diese können auf Transistorebene langsam aber genau (BSIM oder PSP) und auf der Gatter-Ebene schneller aber unter Vernachlässigung wichtiger Parameter (Liberty) vorhergesagt werden. In dieser Arbeit werden Modelle auf RT Ebene entwickelt, die schneller als bisherige Gatter Modelle aber nahezu so genau wie Transistormodelle sind. Dafür wird eine Modellhierarchie von einfachen Transistorbeschreibungen über Gattermodelle bis hin zu RT Soft Makros entwickelt, in der alle wesentlichen Parameter entweder zur nächsten Ebene durchgereicht (und sind dann bis hin zur Systemebene verfügbar) oder, wo möglich, implizit in die Modelle integriert werden. Diese Modelle sind millionenfach schneller als SPICE aber innerhalb von 3.6% - 6.9% Standardabweichung für eine weite Spanne an Temperaturen, Betriebsspannungen und Prozessvariationen. <dt.>
VLSI-SoC Design Methodologies for SoC and SiP ( Computer File )
2 editions published in 2010 in English and held by 10 libraries worldwide
Synthèse de systèmes logiques asynchrones à l'aide des propriétés des fonctions logiques décroissantes by Christian Piguet( Book )
3 editions published in 1981 in French and held by 8 libraries worldwide
PATMOS '95 : Power and timing modeling for performance of integrated circuits ( Book )
1 edition published in 1995 in English and held by 6 libraries worldwide
L'aventure de la montre à quartz : mutation technologique initiée par le Centre électronique horloger, Neuchâtel ( Book )
1 edition published in 2002 in French and held by 5 libraries worldwide
Power and timing modeling for performance of integrated circuits ( Book )
1 edition published in 1995 in English and held by 5 libraries worldwide
This book contains contributions to the 1995 PATMOS Workshop on Power and Timing Modeling for Performance of Integrated Circuits, held at OFFIS, Oldenburg, Germany. For five years the PATMOS series of annual workshops is the traditional European forum to discuss modeling, optimization and simulation of ICs at the physical and logical level. Outstanding scientific contributions are mixed with informal discussions and stimulating panel sessions. Topics of the 1995 workshop include: self-timed design, delay modeling, adder and algorithms optimization, low-power logic design, power estimation, glitch and short-circuit power dissipation, low-power multipliers, parasitic coupling and interconnections, low-power design and reliability, and CAD tools for low-power. <dt.>
Architecture d'alimentation à récupération d'énergie et gestion évenementielle pour les systèmes de capteurs communicants autonomes by Jean-frédéric Christmann( file )
1 edition published in 2013 in French and held by 3 libraries worldwide
Wireless Sensor Networks (WSN) development leverages recent progress in electronic devices power consumption and in energy harvesting technologies in order to create smart sensing structures useful for improvements in various topics such as health monitoring or farming. Thanks to wireless communication circuits lower power consumption, it becomes possible to create networks of sensing systems capable of extracting information from the environment and of transmitting data through the network to the global intelligence. Because of hard and costly maintenance requirements, limited lifespans batteries are a brake on such networks development. Thanks to environmental energy harvesting on solar, thermal or mechanical sources, a system containing sensors and a wireless communication circuit can be powered. Global energy autonomy is thus improved and the node's life is enhanced. Works done during this PhD aim to study energy management within a sensing wireless communicating node. Thanks to the use of advanced multiple power paths architecture leveraging direct power path between the sources and the power loads, the power management system can optimize its energy efficiency when energy is harvested in the environment. Nevertheless, a precise digital control is mandatory to continuously determine the best power path between the energy harvesters, the energy storing capacitors and batteries, and the power loads. An integrated asynchronous controller implements an event-driven management of the power paths and gives the system robustness to environmental energy variations. After modeling and analyzing the power efficiency gain granted by the advanced architecture, an event-driven controller is proposed to ease implementation of wireless sensing applications. The controller is implemented in asynchronous quasi delay insensitive (QDI) logic and presents high intrinsic robustness to environemental variations while maintaining ultra low power consumption. A power management circuit suited for wireless sensing systems is thus fabricated using 180nm CMOS process and includes both architecture and digital management innovations. Its global power consumption close to 1µW allows considering the creation of wireless sensing nodes running for applications in the range of microwatts, consequently enabling development of ultra low power wireless sensor networks
Computer and computing technologies in agriculture III Third IFIP TC 12 International Conference, CCTA 2009, Beijing, China, October 14-17, 2009, Revised selected papers by Daoliang Li( file )
1 edition published in 2010 in English and held by 3 libraries worldwide
This book constitutes the thoroughly refereed post-conference proceedings of the Third IFIP TC 12 International Conference on Computer and Computing Technologies in Agriculture, CCTA 2009, held in Beijing, China, in October 2009. The 80 revised papers were carefully selected from numerous submissions. The papers cover a wide range of interesting theories and applications of information technology in agriculture, including simulation models and decision-support systems for agricultural production, agricultural product quality testing, traceability and e-commerce technology, the application of i
Design methodologies for SoC and SiP revised selected papers ( Book )
1 edition published in 2010 in English and held by 2 libraries worldwide
Di gong hao CMOS dian lu she ji : Luo ji she ji yu CAD gong ju ( Book )
1 edition published in 2011 in Chinese and held by 2 libraries worldwide
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English (77)
French (12)
Chinese (1)
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