The best of ICCAD : 20 years of excellence in Computer-Aided Design (Book, 2003) []
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The best of ICCAD : 20 years of excellence in Computer-Aided Design

Author: Andreas Kuehlmann
Publisher: Boston ; Dordrecht : Kluwer Academic Publishers, cop. 2003.
Edition/Format:   Print book : EnglishView all editions and formats

In 2002, the International Conference on Computer Aided Design (ICCAD) celebrates its 20th anniversary. The sharply increased functionality of board-level circuits led to a major demand for more  Read more...


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Genre/Form: Congresses
Material Type: Internet resource
Document Type: Book, Internet Resource
All Authors / Contributors: Andreas Kuehlmann
ISBN: 1402073917 9781402073915
OCLC Number: 907017455
Notes: Selection of papers from the best contributions presented in ICCAD, to celebrate the 20th anniversary of the International Conference on Computer Aided Design.
Description: XIV, 714 p. : ill. ; 25 cm
Contents: Foreword. Preface. - Part I: Functional Verification. Formal Methods for Functional Verification; R.E. Bryant, J.H. Kukula. Automating the Diagnosis and the Rectification of Design Errors with PRIAM; J.C. Madre, et al. Functional Comparison of Logic Designs for VLSI Circuits; C.L. Berman, L.H. Trevillyan. A Unified Framework for the Formal Verification of Sequential Circuits; O. Coudert, J.C. Madre. Dynamic Variable Ordering for Ordered Binary Decision Programs; R. Rudell. - Part II: System Design and Analysis. System Design and Analysis Overview; H. de Man, J. Rabaey. An Efficient Microcode Compiler for Custom DSP-Processors; G. Goossens, et al. HYPER-LP: A System for Power Minimization Using Architectural Transformations; A.P. Chandrakasan, et al. Power Analysis of Embedded Software: First Step towards Software Power Minimization; V. Tiwari, et al. A Methodology for Correct-by-Construction Latency Insensitive Design; L.P. Carloni, et al. - Part III: Logic Synthesis. Logic Synthesis Overview; R.K. Brayton, J.A. Darringer. Multiple-Level Logic Optimization System; R. Brayton, et al. Exact Minimization of Multi-Valued Functions for PLA Optimization; R. Rudell, A. Sangiovanni-Vincentelli. Improved Logic Optimization Using Global-Flow Analysis; C.L. Berman, L.H. Trevillyan. A Method for Concurrent Decomposition and Factorization of Boolean Expressions; J. Vasudevamurthy, J. Rajski. - Part IV: Analog and Digital Circuit Design. Highlights in Analog and Digital Circuit Design and Synthesis at ICCAD; R. Harjani, et al. An Interactive Device Characterization and Model Development System; E. Khalily, et al. TILOS: A Posynomial Programming Approach to Transistor Sizing; J.P. Fishburn, A.E. Dunlop. SPECS2: An Integrated Circuit Timing Simulator; C. Visweswariah, et al. Automatic Synthesis of Operational Amplifiers based on Analytic Circuit Models; Han Young Koh, et al. - Part V: Physical Simulation and Analysis. Highlights in Physical Simulation and Analysis at ICCAD; K.S. Kundert, J. White. Nonlinear Simulation in the Frequency Domain; K.S. Kundert, A. Sangiovanni-Vincentelli. Modeling the Driving-Point Characteristic of Resistive Interconnect for Accurate Delay Estimation; P.R. O'Brien, T.L. Savarino. Efficient Techniques for Inductance Extraction of Complex 3-D Geometries; M. Kamon, et al. Time-Domain Non-Monte Carlo Noise Simulation for Nonlinear Dynamic Circuits with Arbitrary Excitations; A. Demir, et al. - Part VI: Physical Design. Physical Design Overview; E.S. Kuh, Chi-Ping Hsu. Floorplan Design Using Annealing; R.H.J.M. Otten, L.P.P.P.van Ginneken. GOALIE: A Space-Efficient System for VLSI Artwork Analysis; T.G. Szymanski, C.J.van Wyk. Gordian: A New Global Optimization/ Rectangle Dissection Method for Cell Placement; J.M. Kleinhans, et al. Exact Zero Skew; Ren-Tsong Tsay. - Part VII: Timing, Test and Manufacturing. Timing, Test and Manufacturing Overview; K.A. Sakallah, et al. A Methodology for Worst Case Design of Integrated Circuits; A.J. Strojwas, et al. Timing Analysis using Functional Relationships; D. Brand, V.S. Iyengar. On the Design of Robust Multiple Fault Testable CMOS Combinational Logic Circuits; S. Kundu, et al. Circuit Optimization Driven by Worst-Case Differences; K.J. Antreich, H.E. Graeb. - Part VIII: Industry Viewpoints. A Cadence Perspective on ICCAD; L.K. Scheffe
Responsibility: ed. by Andreas Kuehlmann.
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