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Comprehensive functional verification the complete industry cycle

Author: Bruce Wile; John C Goss; W Roesner
Publisher: Amsterdam ; Boston : Elsevier/Morgan Kaufmann, ©2005.
Series: Morgan Kaufmann series in systems on silicon.
Edition/Format:   eBook : Document : EnglishView all editions and formats
Summary:

One of challenges in chip and system design is determining whether the hardware works correctly. This book describes the verification cycle and details each stage. It follows the cycle, demonstrating  Read more...

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Genre/Form: Electronic book
Electronic books
Additional Physical Format: Print version:
Wile, Bruce.
Comprehensive functional verification the complete industry cycle.
Amsterdam ; Boston : Elsevier/Morgan Kaufmann, ©2005
(OCoLC)60756339
Material Type: Document, Internet resource
Document Type: Internet Resource, Computer File
All Authors / Contributors: Bruce Wile; John C Goss; W Roesner
ISBN: 1423722337 9781423722335 0080476643 9780080476643 9780127518039 0127518037
OCLC Number: 61400208
Description: 1 online resource (xiii, 676 pages) : illustrations.
Contents: Cover --
Author Bios --
FOREWORD --
Table of contents --
PREFACE --
THE VERIFICATION CYCLE --
STRUCTURE OF THE BOOK --
BASIC KNOWLEDGE NEEDED FOR THIS BOOK --
EXERCISES AND SUPPORTING MATERIALS --
ACKNOWLEDGEMENTS --
PART I: INTRODUCTION TO VERIFICATION --
CHAPTER 1: VERIFICATION IN THE CHIP DESIGN PROCESS --
1.1 INTRODUCTION TO FUNCTIONAL VERIFICATION --
1.2 THE VERIFICATION CHALLENGE --
1.3 MISSION AND GOALS OF VERIFICATION --
1.4 COST OF VERIFICATION --
1.5 AREAS OF VERIFICATION BEYOND THE SCOPE OF THIS BOOK --
1.6 THE VERIFICATION CYCLE: A STRUCTURED PROCESS --
1.7 SUMMARY --
1.8 EXERCISES --
CHAPTER 2: VERIFICATION FLOW --
2.1 VERIFICATION HIERARCHY --
2.2 STRATEGY OF VERIFICATION --
2.3 SUMMARY --
2.4 EXERCISES --
CHAPTER 3: FUNDAMENTALS OF SIMULATION-BASED VERIFICATION --
3.1 BASIC VERIFICATION ENVIRONMENT: A TEST BENCH --
3.2 OBSERVATION POINTS: BLACK-BOX, WHITE-BOX, AND GREY-BOX VERIFICATION --
3.3 ASSERTION-BASED VERIFICATION: AN OVERVIEW --
3.4 TEST BENCHES AND TESTING STRATEGIES --
3.5 SUMMARY --
3.6 EXERCISES --
CHAPTER 4: THE VERIFICATION PLAN --
4.1 THE FUNCTIONAL SPECIFICATION --
4.2 THE EVOLUTION OF THE VERIFICATION PLAN --
4.3 CONTENTS OF THE VERIFICATION PLAN --
4.4 VERIFICATION EXAMPLE: CALC1 --
4.5 SUMMARY --
4.6 EXERCISES --
PART II: SIMULATION-BASED VERIFICATION --
CHAPTER 5: HARDWARE DESCRIPTION LANGUAGES AND SIMULATION ENGINES --
5.1 HARDWARE DESCRIPTION LANGUAGES --
5.2 SIMULATION ENGINES: INTRODUCTION --
5.3 EVENT-DRIVEN SIMULATION --
5.4 IMPROVING SIMULATION THROUGHPUT --
5.5 CYCLE-BASED SIMULATION --
5.6 WAVEFORM VIEWERS --
5.7 SUMMARY --
5.8 EXERCISES --
CHAPTER 6: CREATING ENVIRONMENTS --
6.1 TEST BENCH WRITING TOOLS --
6.2 VERIFICATION COVERAGE --
6.3 SUMMARY --
6.4 EXERCISES --
CHAPTER 7: STRATEGIES FOR SIMULATION-BASED STIMULUS GENERATION --
7.1 CALC2 OVERVIEW --
7.2 STRATEGIES FOR STIMULUS GENERATION --
7.3 SUMMARY --
7.4 EXERCISES --
CHAPTER 8: STRATEGIES FOR RESULTS CHECKING IN SIMULATION-BASED VERIFICATION --
8.1 TYPES OF RESULT CHECKING --
8.2 DEBUG --
8.3 SUMMARY --
8.4 EXERCISES --
CHAPTER 9: PERVASIVE FUNCTION VERIFICATION --
9.1 SYSTEM RESET AND BRING-UP --
9.2 ERROR AND DEGRADED MODE HANDLING --
9.3 VERIFYING HARDWARE DEBUG ASSISTS --
9.4 LOW-POWER MODE VERIFICATION --
9.5 SUMMARY --
9.6 EXERCISES --
CHAPTER 10: RE-USE STRATEGIES AND SYSTEM SIMULATION --
10.1 RE-USE STRATEGIES --
10.2 SYSTEM SIMULATION --
10.3 BEYOND GENERAL-PURPOSE LOGIC SIMULATION --
10.4 SUMMARY --
10.5 EXERCISES --
PART III: FORMAL VERIFICATION --
CHAPTER 11: INTRODUCTION TO FORMAL VERIFICATION --
11.1 FOUNDATIONS --
11.2 FORMAL BOOLEAN EQUIVALENCE CHECKING --
11.3 FUNCTIONAL FV-PROPERTY CHECKING --
11.4 SUMMARY --
11.5 EXERCISES --
CHAPTER 12: USING FORMAL VERIFICATION --
12.1 PROPERTY SPECIFICATION USING AN HDL LIBRARY --
12.2 THE PROP.
Series Title: Morgan Kaufmann series in systems on silicon.
Responsibility: Bruce Wile, John C. Goss, Wolfgang Roesner.

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<http:\/\/www.worldcat.org\/oclc\/61400208<\/a>> # Comprehensive functional verification the complete industry cycle<\/span>\n\u00A0\u00A0\u00A0\u00A0a \nschema:Book<\/a>, schema:MediaObject<\/a>, schema:CreativeWork<\/a> ;\u00A0\u00A0\u00A0\nlibrary:oclcnum<\/a> \"61400208<\/span>\" ;\u00A0\u00A0\u00A0\nlibrary:placeOfPublication<\/a> <http:\/\/id.loc.gov\/vocabulary\/countries\/ne<\/a>> ;\u00A0\u00A0\u00A0\nlibrary:placeOfPublication<\/a> <http:\/\/experiment.worldcat.org\/entity\/work\/data\/865228#Place\/amsterdam<\/a>> ; # Amsterdam<\/span>\n\u00A0\u00A0\u00A0\nlibrary:placeOfPublication<\/a> <http:\/\/dbpedia.org\/resource\/Boston<\/a>> ; # Boston<\/span>\n\u00A0\u00A0\u00A0\nschema:about<\/a> <http:\/\/id.loc.gov\/authorities\/subjects\/sh93005422<\/a>> ; # Integrated circuits--Verification<\/span>\n\u00A0\u00A0\u00A0\nschema:about<\/a> <http:\/\/experiment.worldcat.org\/entity\/work\/data\/865228#Topic\/technology_&_engineering_electronics_circuits_vlsi_&_ulsi<\/a>> ; # TECHNOLOGY & ENGINEERING--Electronics--Circuits--VLSI & ULSI<\/span>\n\u00A0\u00A0\u00A0\nschema:about<\/a> <http:\/\/dewey.info\/class\/621.395\/e22\/<\/a>> ;\u00A0\u00A0\u00A0\nschema:about<\/a> <http:\/\/experiment.worldcat.org\/entity\/work\/data\/865228#Topic\/technology_&_engineering_electronics_circuits_logic<\/a>> ; # TECHNOLOGY & ENGINEERING--Electronics--Circuits--Logic<\/span>\n\u00A0\u00A0\u00A0\nschema:about<\/a> <http:\/\/id.worldcat.org\/fast\/975600<\/a>> ; # Integrated circuits--Verification<\/span>\n\u00A0\u00A0\u00A0\nschema:about<\/a> <http:\/\/experiment.worldcat.org\/entity\/work\/data\/865228#Topic\/computers_logic_design<\/a>> ; # COMPUTERS--Logic Design<\/span>\n\u00A0\u00A0\u00A0\nschema:about<\/a> <http:\/\/id.worldcat.org\/fast\/872078<\/a>> ; # Computer engineering<\/span>\n\u00A0\u00A0\u00A0\nschema:bookFormat<\/a> schema:EBook<\/a> ;\u00A0\u00A0\u00A0\nschema:contributor<\/a> <http:\/\/viaf.org\/viaf\/221155298<\/a>> ; # Wolfgang Roesner<\/span>\n\u00A0\u00A0\u00A0\nschema:contributor<\/a> <http:\/\/viaf.org\/viaf\/220536494<\/a>> ; # John C. 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<http:\/\/www.worldcat.org\/oclc\/60756339<\/a>>\u00A0\u00A0\u00A0\u00A0a \nschema:CreativeWork<\/a> ;\u00A0\u00A0\u00A0\nrdfs:label<\/a> \"Comprehensive functional verification the complete industry cycle.<\/span>\" ;\u00A0\u00A0\u00A0\nschema:description<\/a> \"Print version:<\/span>\" ;\u00A0\u00A0\u00A0\nschema:isSimilarTo<\/a> <http:\/\/www.worldcat.org\/oclc\/61400208<\/a>> ; # Comprehensive functional verification the complete industry cycle<\/span>\n\u00A0\u00A0\u00A0\u00A0.\n\n\n<\/div>\n
<http:\/\/www.worldcat.org\/title\/-\/oclc\/61400208<\/a>>\u00A0\u00A0\u00A0\u00A0a \ngenont:InformationResource<\/a>, genont:ContentTypeGenericResource<\/a> ;\u00A0\u00A0\u00A0\nschema:about<\/a> <http:\/\/www.worldcat.org\/oclc\/61400208<\/a>> ; # Comprehensive functional verification the complete industry cycle<\/span>\n\u00A0\u00A0\u00A0\nschema:dateModified<\/a> \"2020-05-10<\/span>\" ;\u00A0\u00A0\u00A0\nvoid:inDataset<\/a> <http:\/\/purl.oclc.org\/dataset\/WorldCat<\/a>> ;\u00A0\u00A0\u00A0\u00A0.\n\n\n<\/div>\n
<http:\/\/www.worldcat.org\/title\/-\/oclc\/61400208#PublicationEvent\/amsterdam_boston_elsevier_morgan_kaufmann_2005<\/a>>\u00A0\u00A0\u00A0\u00A0a \nschema:PublicationEvent<\/a> ;\u00A0\u00A0\u00A0\nschema:location<\/a> <http:\/\/dbpedia.org\/resource\/Boston<\/a>> ; # Boston<\/span>\n\u00A0\u00A0\u00A0\nschema:location<\/a> <http:\/\/experiment.worldcat.org\/entity\/work\/data\/865228#Place\/amsterdam<\/a>> ; # Amsterdam<\/span>\n\u00A0\u00A0\u00A0\nschema:organizer<\/a> <http:\/\/experiment.worldcat.org\/entity\/work\/data\/865228#Agent\/elsevier_morgan_kaufmann<\/a>> ; # Elsevier\/Morgan Kaufmann<\/span>\n\u00A0\u00A0\u00A0\u00A0.\n\n\n<\/div>\n\n

Content-negotiable representations<\/p>\n