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Material Type: | Internet resource |
---|---|
Document Type: | Book, Internet Resource |
All Authors / Contributors: |
Bruce Wile; John C Goss; Wolfgang Roesner |
ISBN: | 0127518037 9780127518039 |
OCLC Number: | 255405266 |
Notes: | Literaturverz. S. [657] - 662. |
Description: | XXIII, 676 Seiten : Diagramme. |
Contents: | Part I: Introduction to Verification Chapter 1: Verification in the Chip Design Process Chapter 2: Verification Flow Chapter 3: Fundamentals of Simulation Based Verification Chapter 4: The Verification Plan Part II: Simulation-Based Verification Chapter 5: HDLs and Simulation Engines Chapter 6: Creating Environments Chapter 7: Strategies for Simulation-based Stimulus Generation Chapter 8: Strategies for Results Checking in Chapter 9: Pervasive Function Verification Chapter 10: Re-Use Strategies and System Simulation Part III: Formal Verification Chapter 11 Introduction to Formal Verification Chapter 12 Using Formal Verification Part IV: Comprehensive Verification Chapter 13: Completing the Verification Cycle Chapter 14: Advanced Verification Techniques Part V: Case Studies Chapter 15: Case Studies Glossary References |
Series Title: | Morgan Kaufmann series in systems on silicon. |
Responsibility: | Bruce Wile ; John C. Goss ; Wolfgang Roesner. |
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