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Development of a Planar Heterojunction Bipolar Transistor for Very High Speed Logic.

Author: Stephen I Long; Herbert Kroemer; M A Rao; CALIFORNIA UNIV SANTA BARBARA Dept. of ELECTRICAL AND COMPUTER ENGINEERING.
Publisher: Ft. Belvoir Defense Technical Information Center 30 OCT 1986.
Edition/Format:   Print book : EnglishView all editions and formats
Summary:
Graded regions of n-(Ga, In)As and p-Ga(As, Sb) were incorporated side-by-side as emitter and base contacts respectively, into an npn (Al, Ga)As/GaAs heterostructure bipolar transistor (HBT). The process involved two separate MBE growths, leading to base contact regions that were self-aligned to the emitter mesas. The devices could be easily probed with pressure contacts even prior to any metallization, and  Read more...
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Document Type: Book
All Authors / Contributors: Stephen I Long; Herbert Kroemer; M A Rao; CALIFORNIA UNIV SANTA BARBARA Dept. of ELECTRICAL AND COMPUTER ENGINEERING.
OCLC Number: 227690418
Notes: See also report dated 28 Mar 86, AD-A170 063.
Description: 18 pages

Abstract:

Graded regions of n-(Ga, In)As and p-Ga(As, Sb) were incorporated side-by-side as emitter and base contacts respectively, into an npn (Al, Ga)As/GaAs heterostructure bipolar transistor (HBT). The process involved two separate MBE growths, leading to base contact regions that were self-aligned to the emitter mesas. The devices could be easily probed with pressure contacts even prior to any metallization, and excellent characteristics were obtained after final metallization.

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