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Digital Integrated Circuits : Analysis and Design, Second Edition

Author: John E Ayers
Publisher: Boca Raton, FL : CRC Press, 2011.
Edition/Format:   eBook : Document : English : Second editionView all editions and formats
Summary:
"Exponential improvement in functionality and performance of digital integrated circuits has revolutionized the way we live and work. The continued scaling down of MOS transistors has broadened the scope of use for circuit technology to the point that texts on the topic are generally lacking after a few years. The second edition of Digital Integrated Circuits: Analysis and Design focuses on timeless principles with  Read more...
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Genre/Form: Electronic books
Material Type: Document, Internet resource
Document Type: Internet Resource, Computer File
All Authors / Contributors: John E Ayers
ISBN: 9781439894958 1439894957 9781420069884 1420069888
OCLC Number: 1027752177
Description: 1 online resource : text file, PDF
Contents: Cover; Half Title; Title Page; Copyright Page; Dedication; Table of Contents; About the Author; Preface; 1: Introduction; 1.1 Historical Perspective and Moore's Law; 1.2 Electrical Properties of Digital Integrated Circuits; 1.2.1 Logic Function; 1.2.2 Static Voltage Transfer Characteristics; 1.2.3 Transient Characteristics; 1.2.4 Fan-In and Fan-Out; 1.2.5 Dissipation; 1.2.6 Power Delay Product; 1.3 Computer-Aided Design and Verifi cation; 1.4 Fabrication; 1.5 Semiconductors and Junctions; 1.6 The MOS Transistor; 1.7 MOS Gate Circuits; 1.8 Interconnect; 1.9 Dynamic CMOS; 1.10 Low-Power CMOS 1.11 Bistable Circuits1.12 Memories; 1.13 Input/Output and Interface Circuits; 1.14 Practical Perspective; 1.15 Summary; 1.16 Exercises; References; 2: Fabrication; 2.1 Introduction; 2.2 Basic CMOS Fabrication Sequence; 2.3 Advanced Processing for High-Performance CMOS; 2.3.1 Copper Metal; 2.3.2 Metal Gates; 2.3.3 High-k Gate Dielectric; 2.4 Lithography and Masks; 2.5 Layout and Design Rules; 2.5.1 Minimum Line Widths and Spacings; 2.5.2 Contacts and Vias; 2.6 Testing and Yield; 2.7 Packaging; 2.8 Burn-In and Accelerated Testing; 2.9 Practical Perspective; 2.10 Summary; 2.11 Exercises 3.9 Metal-Semiconductor Junctions3.10 SPICE Models; 3.11 Practical Perspective; 3.12 Summary; 3.13 Exercises; References; 4: The MOS Transistor; 4.1 Introduction; 4.2 The MOS Capacitor; 4.3 Threshold Voltage; 4.4 MOSFET Current-Voltage Characteristics; 4.4.1 Linear Operation; 4.4.2 Saturation Operation; 4.4.3 Subthreshold Operation; 4.4.4 Transit Time; 4.5 Short-Channel MOSFETs; 4.5.1 The Short-Channel Effect; 4.5.2 Narrow-Channel Effect; 4.5.3 Drain-Induced Barrier Lowering; 4.5.4 Channel Length Modulation; 4.5.5 Field-Dependent Mobility and Velocity Saturation 4.5.6 Transit Time in Short-Channel MOSFETs4.6 MOSFET Design; 4.7 MOSFET Capacitances; 4.7.1 Oxide Capacitances; 4.7.2 p-n Junction Capacitances; 4.7.3 The Miller Effect; 4.8 MOSFET Constant-Field Scaling; 4.9 SPICE MOSFET Models; 4.9.1 MOSFET Level 1 Model; 4.9.2 Berkeley Short-Channel Insulated Gate Field Effect Transistor Model; 4.9.2.1 BSIM1 Parameters; 4.9.2.2 BSIM1 Threshold Voltage; 4.9.2.3 BSIM1 Drain Current-Linear Region; 4.9.2.4 BSIM1 Drain Current-Saturation Region; 4.9.2.5 BSIM1 Drain Current-Subthreshold Region; 4.9.2.6 Hand Calculations Related to the BSIM1
Responsibility: John E. Ayers.

Abstract:

Presenting an instructional text for engineers involved with Very Large Scale Integrated Circuit design and fabrication, this book delves into the dramatic advances, including applications and  Read more...

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