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Fundamentals of parallel MULTICORE architecture

Author: Yan Solihin
Publisher: Boca Raton, FL : CRC Press, Taylor & Francis Group, [2016] ©2016
Series: Chapman & Hall/CRC computational science series.
Edition/Format:   Print book : EnglishView all editions and formats

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Document Type: Book
All Authors / Contributors: Yan Solihin
ISBN: 1482211181 9781482211184
OCLC Number: 884540034
Notes: "A Chapman & Hall book."
Description: xxvi, 468 pages : illustrations, portraits ; 26 cm.
Contents: Perspectives on Multicore Architectures The Origin of the Multicore Architecture Perspectives on Parallel Computers Future Multicore Architectures Perspectives on Parallel Programming Limits on Parallel Program Performance Parallel Programming Models Shared Memory Parallel Programming Steps in Parallel Programming Dependence Analysis Identifying Parallel Tasks in Loop StructuresIdentifying Parallelism at Other Levels Identifying Parallelism through Algorithm Knowledge Determining the Scope of Variables Synchronization Assigning Tasks to Threads Mapping Threads to Processors A Brief Introduction to OpenMP Parallel Programming for Linked Data Structures Parallelization Challenges in LDS Approaches to Parallelization of LDS Parallelization Techniques for Linked Lists The Role of Transactional Memory Introduction to Memory Hierarchy Organization Motivation for Memory Hierarchy Basic Architectures of a Cache Cache Performance Prefetching Cache Design in Multicore Architecture Physical Cache Organization Logical Cache OrganizationCase StudiesIntroduction to Shared Memory Multiprocessors The Cache Coherence Problem Memory Consistency Problem Synchronization Problem Basic Cache Coherence Issues Overview Cache Coherence in Bus-Based Multiprocessors Impact of Cache Design on Cache Coherence Performance Performance and Other Practical Issues Broadcast Protocol with Point-to-Point Interconnect Hardware Support for Synchronization Lock Implementations Barrier Implementations Transactional Memory Memory Consistency Models Programmers' Intuition Architecture Mechanisms for Ensuring Sequential Consistency Relaxed Consistency ModelsSynchronization in Different Memory Consistency Models Advanced Cache Coherence Issues Directory Coherence Protocols Overview of Directory Coherence Protocol Basic Directory Cache Coherence Protocol Implementation Correctness and Performance Contemporary Design IssuesInterconnection Network Architecture Link, Channel, and Latency Network Topology Routing Policies and Algorithms Router Architecture Case Study: Alpha 21364 Network Architecture Multicore Design Issues SIMT Architecture SIMT Programming Model Mapping SIMT Workloads to SIMT Cores SIMT Core Architecture Ask the ExpertsExercises appear at the end of each chapter.
Series Title: Chapman & Hall/CRC computational science series.
Responsibility: Yan Solihin.


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"This text provides a lucid and comprehensive treatment of hardware/software foundations of parallel architectures by a leading expert in the area."-Rajeev Balasubramonian, University of Utah"This Read more...

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