VHDL by example : a concise introduction for FPGA design (Book, 2014) [WorldCat.org]
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VHDL by example : a concise introduction for FPGA design

Author: Blaine C Readler
Publisher: [Lieu de publication non identifié] : Full Arc Press, ©2014.
Edition/Format:   Print book : EnglishView all editions and formats
Summary:
"A practical primer for the student and practicing engineer already familiar with the basics of digital design, the reference develops a working grasp of the VHDL hardware description language step-by-step using easy-to-understand examples. Starting with a simple but workable design sample, increasingly more complex fundamentals of the language are introduced until all core features of VHDL are brought to light.  Read more...
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Details

Document Type: Book
All Authors / Contributors: Blaine C Readler
ISBN: 9780983497356 0983497354
OCLC Number: 1005706158
Notes: Includes index.
Description: 1 v. (111 p.) : illustrations ; 23 cm
Contents: Introduction --
The tool flow --
In an out --
Clocks and registers --
State machines --
Modular design --
Memories --
Managing clocks --
I/O flavors --
A taste of simulation --
The rest for reference --
Index
Responsibility: Blaine C. Readler.

Abstract:

"A practical primer for the student and practicing engineer already familiar with the basics of digital design, the reference develops a working grasp of the VHDL hardware description language step-by-step using easy-to-understand examples. Starting with a simple but workable design sample, increasingly more complex fundamentals of the language are introduced until all core features of VHDL are brought to light. Included in the coverage are state machines, modular design, FPGA-based memories, clock management, specialized I/O, and an introduction to techniques of simulation. The goal is to prepare the reader to design real-world FPGA solutions."--The publisher.

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